WEBINAR: How to Improve IP Quality for Compliance

Establishing traceability is critical for many organizations — and a must for those who need to prove compliance. Too often, the compliance process is manual, leading to errors and even delays. A simple clerical mistake can invalidate results and lead to larger issues throughout the product’s lifecycle. Developing a unified, IP-centric platform can help organizations improve overall quality while meeting compliance standards, like ISO 26262.

Compliance standards, such as ISO26262, require the SoC developer to collect and document evidence of compliance during the design process. These documents need to prove that requirements have been met by tracing tests and test results back to requirements on an IP. They need to show that “defensive” design techniques have been used.

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The Perforce/Methodics IPLM platform is designed to have IP at the center of a compliance workflow. So, what is an IP? An IP is an abstract model that combines the design data files (that define its implementation) and metadata (that defines its state). Although this model is well-known in the semiconductor industry, it can revolutionize a business by creating full transparency into how IP objects evolve across projects and teams.

By centralizing IP management, designers and developers can collaborate inside their tools while creating a traceable flow from requirements, through design, to verification. This is because all software, firmware, and hardware IP metadata is stored in a single layer on top of a data management system. This metadata is comprised of information such as dependencies, permissions, hierarchy, properties, usage, and more. With IPLM, organizations can automate processes by using metadata that was collected and stored through the design and verification steps to automatically build FuSa compliance documentation.

There are other advantages when moving to an IP-centric workflow besides meeting compliance. By attaching relevant metadata to each IP, organizations can have a single source of truth that enables reuse across projects and teams. Making the design transparent allows individual blocks to evolve at their own pace, boosting innovation and cutting down on development costs. Because all the information around an IP is managed with Perforce IPLM Software, organizations can retain the context and connection back to the rest of the design, as well as the requirements. This improves overall quality while meeting regulatory standards.

Furthermore, since everything inside of IPLM is treated as an IP, this enables the creation of a full system level hierarchical Bill of Materials.  This facilitates the generation of correct-by-construction full system configurations, including the desired versions of all hardware, software, and firmware design IPs as specified by the project level IP hierarchy. This enables traceability from the silicon back to the exact IP BoM used for tape-out. This also helps to eliminate costly errors introduced by manual and outdated methods of configuration management, such as spreadsheets or simple text files. These errors could lead to delayed tape-outs, improperly functioning silicon, ECOs, and mask re-spins.

Learn more about IP quality and compliance from Wayne Kohler — Senior Solutions Engineer at Perforce. Join a live discussion with him on Wednesday, April 27, 2022, at 12:00 PM – 1:00 PM CDT. He’ll review how to build a platform to improve traceability and what you need to consider when complying with ISO 26262.

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Also read:

Future of Semiconductor Design: 2022 Predictions and Trends

Webinar – SoC Planning for a Modern, Component-Based Approach

You Get What You Measure – How to Design Impossible SoCs with Perforce