Oasys Gets Funding from Intel and Xilinx

Oasys announced that it closed its series B funding round with investments from Intel Capital and Xilinx. The fact that any EDA company has closed a funding round is newsworthy these days; companies running out of cash and closing the doors seems to be a more common story.

Oasys has been relatively quiet, which some people have taken to mean that nobody is using RealTime Designer, their synthesis tool. But in fact they have announced that #2-4 US semiconductor companies, namely Texas Instruments, Qualcomm and Broadcom (via its acquisition of Netlogic) are customers. As is Xilinx, the #1 FPGA vendor, or vendor of programmable platforms as they seem to want to be known. Now with Intel, Oasys have filled out the enviable position of having relationships with the top 4 US semiconductor vendors and the top FPGA vendor. These are the companies doing many of the most advanced designs today.

On the SoC side, Oasys have tapeouts at both 45nm and 28nm already. Ramon Macias of Netlogic (now part of Broadcom) said publicly nearly a year ago, they had already taped out their first 45nm design and were now using RealTime Designer on 28nm designs. On the programmable platform side, Xilinx licensed Oasys’s technology a couple of years ago and have been using it internally. They have “achieved excellent results across a wide range of designs.”

Chip Synthesis is a fundamental shift in how synthesis is applied to the design and implementation of integrated circuits (ICs). Traditional block-level synthesis tools do a poor job of handling chip-level issues. RealTime Designer is the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs and produces better results in a fraction of the time needed by traditional logic synthesis products. It features a unique RTL placement approach that eliminates unending design closure iterations between synthesis and layout.