TSMC is describing an artificial intelligence boom that reaches beyond accelerator chips into the wider computing infrastructure needed to support increasingly capable AI systems. On the recent investor call, Chairman and CEO Dr. C.C. Wei presents strong demand, persistent supply constraints and an ambitious expansion … Read More
Terafab’s Single Roof: Why Packaging, Not Lithography, Decides High Volume
By Shaurya Seth
Terafab is one of the most ambitious projects of the decade: $16.8 billion for phase one and up to $119 billion across four phases. A research fab in Austin iterates on process recipes, transistor designs, and packaging variants at a few thousand wafers per month. A volume fab in Grimes County targets 100,000 wafer… Read More
Why Semiconductor AI Starts with Data, Not Algorithms
The next gains from AI in semiconductors will come less from models and more from making fab and test data reliable, connected and tied to engineering decisions.
By Sriram Nithin Gopal Lanka
Every few months there is a new AI model that can do more and semiconductor manufacturers are under pressure to put them to work. But ask the engineers… Read More
What DARPA Taught Me About Building Trust into Silicon
By Sajeed Mohammad
The most memorable slide I ever saw in a chip design review didn’t show a floorplan. It showed a target. The Defense Advanced Research Projects Agency (DARPA) program manager running AISS, Automatic Implementation of Secure Silicon, the program that funded my majority of PhD research, had put a target… Read More
Delivering Silicon Systems Through AI Disruption, Part 1: Writing the Score
Score: the written music for an orchestra, with every section’s part laid out on the same page so they play together. In this article, it’s your designed workflows.
Is AI helping you hit your tape-out date, or putting it at risk? How would you know?
Every Director I talk to is being asked to use AI to deliver faster, or better,… Read More
Teradyne Unveils Magnum E2 for the Next Wave of AI Memory
Teradyne has announced Magnum E2, a memory test system designed to address the increasingly demanding interfaces used in artificial intelligence and high performance computing. The platform targets advanced DRAM and flash technologies, including LPDDR6, DDR6, GDDR7, and NAND flash, while combining engineering and production… Read More
VSORA’s Sandra Rivera on the Inference Era: Demand Is Real, But Not Everyone Survives
Sandra Rivera, Chair of VSORA, joined Bloomberg’s The Close in July for an interview on the current state of AI. What follows is a summary of that conversation.
When a Silicon Valley veteran who once ran Intel’s Data Center and AI Group, and now chairs a French inference-chip challenger, sits down with a tech journalist from Bloomberg,… Read More
Intel’s Open Software Blueprint: Why Production AI Needs More Than GPUs
Intel’s strategic argument about enterprise AI is that the value of a model depends on the system that surrounds it. In an article by executives Bill Pearson and Anil Nanduri, the company positions open software as the connective tissue linking CPUs, GPUs, data, and business applications. The message is straightforward: accelerator… Read More
From 25 Million Pixels to a Six-Ounce Product: Engineering Visor for Manufacturing
By Dr. Moh Kolbehdari
Putting roughly 25 million pixels into a wearable device weighing about six ounces sounds, at first, like a display problem.
It is not.
The displays must fit behind an optical system capable of turning those pixels into a usable visual field. Compute must generate and move the required data. Power must support… Read More
TSMC 2026 OIP Ecosystem Forum Summary
TSMC’s 2026 Open Innovation Platform Forum presented artificial intelligence as the force reshaping semiconductor design. Its central argument is that faster chips will require progress across the whole system: logic, memory, packaging, interconnects, power delivery and design methods. TSMC places its partner ecosystem… Read More


Rethinking Phase Jitter: An Algorithmic Approach to Signal Integrity