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WEBINAR: Architecture Exploration of System-on-chip using VisualSim Hybrid RISC-V and ARM Processor library

WEBINAR: Architecture Exploration of System-on-chip using VisualSim Hybrid RISC-V and ARM Processor library
by Daniel Nenni on 07-26-2021 at 6:00 am

Aug5 TechTalk 2

80% of specification optimization and almost 100% of the performance/power trade-offs can be achieved during architecture exploration of product design.  RISC-V offers a huge opportunity with lots of pipeline and instruction set enhancement opportunities.  Can it really attain the utopian success that people are looking… Read More


StarFive Surpasses Development Goal with the Prodigy Rapid Prototyping System from S2C

StarFive Surpasses Development Goal with the Prodigy Rapid Prototyping System from S2C
by rdgreen on 07-13-2021 at 10:00 am

SartFive

Faced with the challenge of developing a high-performance hardware platform with critical software components, what choices do companies have in rapidly moving their development forward with modest budgets and resources?

That was the challenge faced by StarFive Technology, a leading IP and semiconductor SoC platform solution… Read More


A Free RISC-V CPU Core Builder – Democratizing CPUs

A Free RISC-V CPU Core Builder – Democratizing CPUs
by Steve Hoover on 06-27-2021 at 6:00 am

warp v.org

There are now over a hundred RISC-V CPU cores listed on riscv.org‘s RISC-V Exchange! Amazing. If you need a RISC-V CPU core, you’ll likely be able to find one that suits your needs… if you evaluate a hundred CPU cores to find it.

Or, now, you can configure exactly the core you need, and have it built in seconds, for free! WARP-V Read More


Life in a Formal Verification Lane

Life in a Formal Verification Lane
by Shinavi Shah on 06-22-2021 at 6:00 am

New image for semiwiki

This summer, I got the opportunity to work as a Formal Verification Intern with Axiomise for six weeks. I’m a keen designer and love working in design and architecture. Although, I’ve not started my professional career yet, I have done most of my projects as a designer in my undergraduate and postgraduate studies.

Having said that,… Read More


Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration

Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration
by Lauro Rizzatti on 06-07-2021 at 10:00 am

image001 6

Three-year old CacheQ, founded by two former Xilinx executives and a clever group of engineers, produces a distributed heterogenous compute development environment targeting software developers with limited knowledge of hardware architecture.

The promise of compiler tools for heterogeneous compute systems intrigued… Read More


Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads

Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads
by Kalar Rajendiran on 05-17-2021 at 10:00 am

SuperCharge ML Performance

During the week of April 19th, Linley Group held its Spring Processor Conference 2021. The Linley Group has a reputation for convening excellent conferences. And this year’s spring conference was no exception. There were a number of very informative talks from various companies updating the audience on the latest research and… Read More


Why Near-Threshold Voltage is an Excellent Choice for Hearables

Why Near-Threshold Voltage is an Excellent Choice for Hearables
by Lauri Koskinen on 05-05-2021 at 6:00 am

blog part 3 energy frugality graphic FINAL 1

In the previous blogs on this topic, we’ve seen that utilizing near-threshold voltage (NTV) saves incredible amounts of energy, theoretically up to 10x and in practice from 2x to 4x. But there is a price which makes some applications more suited for NTV than others. This is due to the inevitable performance (speed) loss of NTV as … Read More


RISC-V is Building Momentum

RISC-V is Building Momentum
by Adrienne Downey on 04-05-2021 at 10:00 am

RISC V END MKTS

The semiconductor intellectual property (SIP) market is an integral part of the semiconductor industry. Third-party IP has propelled the industry, opening the door for many new products from start-ups to established IDMs. Enabling increasingly complex devices, reducing the cost of product development and reducing the time… Read More


Enabling Edge AI Vision with RISC-V and a Silicon Platform

Enabling Edge AI Vision with RISC-V and a Silicon Platform
by Tom Simon on 03-15-2021 at 10:00 am

AI Chipset Market

AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling facts in their recent paper titled “Enabling AI Vision at the Edge.” AI vision is being deployed in many applications, such as autonomous vehicles, smart cities, … Read More


ESL Expertise when You Need It. Spinning Up Faster

ESL Expertise when You Need It. Spinning Up Faster
by Bernard Murphy on 12-30-2020 at 6:00 am

CircuitSutra min

System-level expertise, once the domain a few architecture specialists, is now shouldering its way everywhere into chip design and verification. In virtual modeling together with OS and application software certainly. That now couples into mixed-level system-verification, using different levels of abstraction for different… Read More