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Synopsys Webinar: The Importance of Security in Multi-Die Designs – Navigating the Complex Landscape

Synopsys Webinar: The Importance of Security in Multi-Die Designs – Navigating the Complex Landscape
by Daniel Nenni on 04-11-2025 at 6:00 am

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In today’s rapidly evolving digital landscape, the security of electronic systems is of the highest priority. This importance is underscored by technological advancements and increasing regulatory demands. Multi-die designs which integrate multiple dies (also called chiplets) into a single package, introduce … Read More


Generative AI Comes to High-Level Design

Generative AI Comes to High-Level Design
by Daniel Payne on 04-10-2025 at 10:00 am

high level agents min

I’ve watched the EDA industry change the level of design abstraction starting from transistor-level to gate-level, then RTL, and finally using High Level Synthesis (HLS). Another emerging software trend is the use of generative AI to make coding RTL more automated. There’s a new EDA company called Rise Design Automation that… Read More


A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips

A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips
by Mike Gianfagna on 04-03-2025 at 10:00 am

A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips

Generative AI is dramatically changing the compute power that must be delivered by advanced designs. This demand has risen by more than 10,000 times in the past five to six years.  This increased demand has impacted the entire SoC design flow. We are now faced with going beyond 1 trillion transistors per chip, and systems now consist… Read More


Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction

Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction
by Daniel Nenni on 03-27-2025 at 10:00 am

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We have been hearing so much lately about the power of AI and the potential of technologies like agentic AI to address the productivity gap and complexities of semiconductor designs of today and tomorrow.  Currently, however, the semiconductor industry has been slow to adopt generative and agentic AI for RTL design code.   There… Read More


Webinar: RF board design flow examples for co-simulating active circuits

Webinar: RF board design flow examples for co-simulating active circuits
by Don Dingee on 03-25-2025 at 10:00 am

Mesh domain optimization

In part one of this webinar series, Keysight and Modelithics looked at the use of 3D passive vendor component models supporting highly accurate, automated 3D EM-circuit co-simulation of high-frequency RF board designs. Part two continues the exploration of RF board design flows for simulating active circuits on boards, again… Read More


DVCon 2025: AI and the Future of Verification Take Center Stage

DVCon 2025: AI and the Future of Verification Take Center Stage
by Lauro Rizzatti on 03-06-2025 at 10:00 am

DVCon 2025

The 2025 Design and Verification Conference (DVCon) was a four-day event packed with insightful discussions, cutting-edge technology showcases, and thought-provoking debates. The conference agenda included a rich mix of tutorial sessions, a keynote presentation, a panel discussion, and an exhibit hall with Electronic… Read More


Webinar: RF design success hinges on enhanced models and accurate simulation

Webinar: RF design success hinges on enhanced models and accurate simulation
by Don Dingee on 02-19-2025 at 10:00 am

Modelithics 3D Library for RFPro increases the chances for RF design success

Traditional RF board design strategies based on circuit simulation worked at lower frequencies and relatively large spacing between components. Higher frequencies and densification dominate RF designs now, where corresponding wider bandwidths and tighter layouts with closely spaced components produce more complex 3D… Read More


Samtec Advances Multi-Channel SerDes Technology with Broadcom at DesignCon

Samtec Advances Multi-Channel SerDes Technology with Broadcom at DesignCon
by Mike Gianfagna on 02-18-2025 at 6:00 am

Samtec Advances Multi Channel SerDes Technology with Broadcom at DesignCon

There were many announcements and significant demonstrations of new technology at the recent DesignCon. The show celebrated its 30th anniversary this year and it has grown quite a bit. As in past years Samtec had a commanding presence at the show. There will be more about that in a moment, but first I want to focus on a substantial … Read More


Synopsys Expands Optical Interfaces at DesignCon

Synopsys Expands Optical Interfaces at DesignCon
by Mike Gianfagna on 02-17-2025 at 6:00 am

Synopsys Expands Optical Interfaces at DesignCon

The exponential growth of cloud data centers is well-known. Driven by the demands of massive applications like generative AI, state-of-the-art data centers present substantial challenges in terms of power consumption. And AI is poised to drive a 160% increase in data center power demand while also increasing demands on storage… Read More


Webinar: Unlocking Next-Generation Performance for CNNs on RISC-V CPUs

Webinar: Unlocking Next-Generation Performance for CNNs on RISC-V CPUs
by Daniel Nenni on 02-13-2025 at 10:00 am

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The growing demand for high-performance AI applications continues to drive innovation in CPU architecture design. As machine learning workloads, particularly convolutional neural networks (CNNs), become more computationally intensive, architects face the challenge of delivering performance improvements while maintaining… Read More