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Synopsys recently hosted an information rich-webinar, modestly titled “Improving Quality, FuSa, Reliability, and Security in Automotive Semiconductors”. I think they undersold the event; this was really about managing all of those things through the lifecycle of a car, in line with auto OEMs strategies for the future of the… Read More
Traditional simulation-based power analysis methods face insurmountable challenges to accurately capture complex designs activities in real-world scenarios. As the scale… Read More
Semiconductor intellectual property (IP) plays a critical role in modern system-on-chip (SoC) designs. That’s not surprising given that modern SoCs are highly complex designs that leverage already proven building blocks such as processors, interfaces, foundational IP, on-chip bus fabrics, security IP, and others. This… Read More
SNUG is the premier event for Synopsys to showcase its technology and impact on the industry. This year’s SNUG did not disappoint. The two-day event packed many fantastic user presentations along with exciting news of innovation from Synopsys. Jensen Huang and Sassine Ghazi even held a live, interactive Q&A session. Compelling… Read More
Earlier this month, SemiWiki wrote about Synopsys’s complete 1.6T Ethernet IP solution to drive AI and Hyperscale Data Center chips. A technology’s success is all about when, where and how it gets adopted within the ecosystem. In the high-speed ethernet ecosystem, the swift adoption of 1.6T Ethernet relies on key roles and coordinated… Read More
NVIDIA cuLitho Accelerates Semiconductor Manufacturing’s Most Compute-Intensive Workload by 40-60x, Opens Industry to New Generative AI Algorithms.
An incredible example of semiconductor industry partnerships was revealed during the Synopsys User Group (SNUG) last month. It started with a press release but there is much… Read More
After the leadership transition at the top, Synopsys had just a little more than two months before the company’s flagship event, the Synopsys User Group (SNUG) conference. The Synopsys user community and entire ecosystem were waiting to hear new CEO Sassine Ghazi’s keynote to learn where the company is going and its strategic … Read More
2024 DVCon was very busy this year. Bernard Murphy and I were in attendance for SemiWiki, he has already written about it. Multi die and chiplets was again a popular topic. Lauro Rizzatti, a consultant specializing in hardware-assisted verification, moderated an engaging panel, sponsored by Synopsys, focusing on the intricacies… Read More
Complexity and density conspire to make power delivery very difficult for advanced SoCs. Signal integrity, power integrity, reliability and heat can seem to present unsolvable problems when it comes to efficient power management. There is just not enough room to get it all done with the routing layers available on the top side… Read More
The demand for high-bandwidth, low-latency networking solutions has never been greater. As artificial intelligence (AI) workloads continue to grow exponentially, and hyperscale data centers become the backbone of our digital infrastructure, the need for faster and more efficient communication technologies becomes imperative.… Read More
Podcasts
Podcast EP219: How Synopsys Addresses Debug and Coverage Closure Challenges with Robert Ruiz
Podcast EP188: The New Demands for Memory Design and the Synopsys Approach with Anand Thiruvengadam
Podcast EP185: DRAM Scaling, From Atoms to Circuits with Synopsys’ Dr. Victor Moroz
Podcast EP178: An Overview of Advanced Power Optimization at Synopsys with William Ruby
Podcast EP169: How Are the Standards for the Terabit Era Defined?
Podcast EP152: An Informal Conversation with Aart de Geus on AI and Multi-Die at SNUG
Podcast EP148: The Synopsys View of High-Performance Communication and the Role of Chiplets
Podcast EP141: The Role of Synopsys High-Speed SerDes for Future Ethernet Applications
Podcast EP240: Challenges and Strategies to Address New Embedded Memory Architectures with Mark Han
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