WP_Term Object
(
    [term_id] => 159
    [name] => Siemens EDA
    [slug] => siemens-eda
    [term_group] => 0
    [term_taxonomy_id] => 159
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 749
    [filter] => raw
    [cat_ID] => 159
    [category_count] => 749
    [category_description] => 
    [cat_name] => Siemens EDA
    [category_nicename] => siemens-eda
    [category_parent] => 157
    [is_post] => 
)
            
Q2FY24TessentAI 800X100
WP_Term Object
(
    [term_id] => 159
    [name] => Siemens EDA
    [slug] => siemens-eda
    [term_group] => 0
    [term_taxonomy_id] => 159
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 749
    [filter] => raw
    [cat_ID] => 159
    [category_count] => 749
    [category_description] => 
    [cat_name] => Siemens EDA
    [category_nicename] => siemens-eda
    [category_parent] => 157
    [is_post] => 
)

New Frontiers in the Storage System Market Call for the Best of ICE and Virtual Emulation

New Frontiers in the Storage System Market Call for the Best of ICE and Virtual Emulation
by Richard Pugh on 10-26-2016 at 7:00 am

The storage market has reached what Andy Grove once described as “…a strategic inflection point.”[1] This is the stage in the life of a business when its fundamentals are about to change.

Changing fundamentals in the storage market—where solid state drives (SSD) are now at the forefront of multiple storage applications,… Read More


ARM and SoftBank: A Joint Vision of the Future!

ARM and SoftBank: A Joint Vision of the Future!
by Daniel Nenni on 10-18-2016 at 8:00 pm

Next week is ARM TechCon and I’m extra excited about this one because of the SoftBank acquisition. In fact, the opening keynote says it all. ARM CEO Simon Segar and SoftBank CEO Masayoshi Son will discuss the next chapter in the book of ARM. To better prepare for this keynote you should probably read our book “Mobile Unleashed: The Read More


Low power physical design in the age of FinFETs

Low power physical design in the age of FinFETs
by Beth Martin on 09-30-2016 at 7:00 am

Low power is now a goal for most digital circuit designs. This is to reduce costs for packaging, cooling, and electricity; to increase battery life; and to improve performance without overheating. I talked to the experts on physical design for ultra-low power at Mentor Graphics recently about the challenges to P&R tools and… Read More


Making photonic design more straightforward

Making photonic design more straightforward
by Don Dingee on 09-27-2016 at 4:00 pm

The arrival of optical computing has been predicted every year for the last fifteen years. As with any other technology backed by prolific research, lofty goals get dialed back as problems are identified. What emerges first is a set of use cases where the technology fits with practical, realizable implementations.

When it comes… Read More


Market Trends Motivate a Shift-Left in Functional Verification

Market Trends Motivate a Shift-Left in Functional Verification
by Jean-Marie Brunet on 09-15-2016 at 4:00 pm

Today, in the context of functional verification, industry trends are based on the needs of prominent vertical markets. There is some overlap in what these markets need, but there are some use models that are very specific to each market.

We assert this because we have a lot of customers asking about emulation solutions not from … Read More


Mentor Functional Verification Study 2016

Mentor Functional Verification Study 2016
by Bernard Murphy on 09-14-2016 at 7:00 am

Periodically, Mentor commissions a user/usage survey on Functional Verification, conducted by the Wilson Research Group, then they publish the results to all of us, an act of industry good-citizenship for which I think we owe them a round of thanks. Harry Foster at Mentor is breaking down the report into a series of 15 blogs. He’s… Read More


Five Things To See at DVCon India 2016

Five Things To See at DVCon India 2016
by Daniel Payne on 09-02-2016 at 12:00 pm

DVCon is an annual Design and Verification Conference that started out in Silicon Valley, then expanded by adding India as a new location. Our semiconductor design and verification world is global in stature, so if you’re living in the region then consider registering for this event held Thursday and Friday, September Read More


A new world of 10nm design constraints

A new world of 10nm design constraints
by Beth Martin on 08-30-2016 at 4:00 pm

Every time the industry transitions to a smaller process node IC design software undergoes extensive updates.

I talked to a couple of experts in physical design at Mentor Graphics about what is involved in making place-and-route software ready for a new node. This is what I learned from Sudhakar Jilla, the IC design marketing director… Read More


Striving for one code base in accelerated testbenches

Striving for one code base in accelerated testbenches
by Don Dingee on 08-26-2016 at 4:00 pm

Teams buy HDL simulation for best bang for the buck. Teams buy hardware emulation for the speed. We’ve talked previously about SCE-MI transactors as a standardized vehicle to connect the two approaches to get the benefits of both in an accelerated testbench – what else should be accounted for?… Read More


Rigid-Flex Cabling is Cool! (and requires unique EDA support)

Rigid-Flex Cabling is Cool! (and requires unique EDA support)
by Tom Dillinger on 08-15-2016 at 10:00 am

The three F’s of electronic product development are: form, fit, and function. Although the F/F/F assessment typically refers to the selection of the right component, it most definitely also refers to the selection of the proper cabling between assemblies. The requirements for cables are varied, and demanding: ability… Read More