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EDA

Electronic Design Automation

Podcast EP264: How Sigasi is Helping to Advance Semiconductor Design with Dieter Therssen

Podcast EP264: How Sigasi is Helping to Advance Semiconductor Design with Dieter Therssen
by Daniel Nenni on 12-06-2024 at 10:00 am
Categories: EDA

Dan is joined by Dieter Therssen, CEO of Sigasi. Deiter started his career as a hardware design engineer, using IMEC’s visionary tools and design methodologies in the early days of silicon integration. Today, being CEO of Sigasi, a fast-growing, creative technology company is a perfect fit for Dieter. Having worked in that space… Read More

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SystemReady Certified: Ensuring Effortless Out-of-the-Box Arm Processor Deployments

SystemReady Certified: Ensuring Effortless Out-of-the-Box Arm Processor Deployments
by Lauro Rizzatti on 12-05-2024 at 10:00 am
Categories: Arm, IP, Synopsys

SystemReady Certified Ensuring Out of the Box Effortless Arm Processors Deployments Figure 1

When contemplating the Lego-like hardware and software structure of a leading system-on-chip (SoC) design, a mathematically inclined mind might marvel at the tantalizing array of combinatorial possibilities among its hardware and software components. In contrast, the engineering team tasked with its validation may have… Read More

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Accelerating Electric Vehicle Development – Through Integrated Design Flow for Power Modules

Accelerating Electric Vehicle Development – Through Integrated Design Flow for Power Modules
by Kalar Rajendiran on 12-04-2024 at 10:00 am
Categories: Automotive, Cadence, EDA

Existing EV Power Module Flow

The development of electric vehicles (EVs) is key to transitioning to sustainable transportation. However, designing high-performance EVs presents significant challenges, particularly in power module design. Power modules, including inverters, bulky DC capacitors, power management ICs (PMICs), and battery packs, … Read More

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A Master Class with Ansys and Synopsys, The Latest Advances in Multi-Die Design

A Master Class with Ansys and Synopsys, The Latest Advances in Multi-Die Design
by Mike Gianfagna on 12-04-2024 at 6:00 am
Categories: 3D IC, Ansys, Inc., EDA, Synopsys
1 Comment

A Master Class with Ansys and Synopsys, The Latest Advances in Multi Die Design

2.5D and 3D multi-die design is rapidly moving into the mainstream for many applications. HPC, GPU, mobile, and AI/ML are application areas that have seen real benefits. The concept of “mix/match” for chips and chiplets to form a complex system sounds deceptively simple. In fact, the implementation and analysis techniques required… Read More

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Innexis Product Suite: Driving Shift Left in IC Design and Systems Development

Innexis Product Suite: Driving Shift Left in IC Design and Systems Development
by Kalar Rajendiran on 12-03-2024 at 6:00 am
Categories: EDA, Emulation, Siemens EDA

Full Spectrum Development Inexis Developer Pro

At the heart of the shift-left strategy is the goal of moving traditionally late-stage tasks—such as software development, validation, and optimization—earlier in the design process. This proactive approach allows teams to identify and resolve issues before they escalate, reducing costly rework and shortening the overall… Read More

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How Breker is Helping to Solve the RISC-V Certification Problem

How Breker is Helping to Solve the RISC-V Certification Problem
by Mike Gianfagna on 12-02-2024 at 10:00 am
Categories: Breker Verification Systems, EDA

How Breker is Helping to Solve the RISC V Certification Problem

RISC-V cores are popping up everywhere. The growth of this open instruction set architecture (ISA) was quite evident at the recent RISC-V summit. You can check out some of the RISC-V buzz on SemiWiki here. While all this is quite exciting and encouraging, there are hurdles to face before true prime-time, ubiquitous application… Read More

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MZ Technologies is Breaking Down 3D-IC Design Barriers with GENIO

MZ Technologies is Breaking Down 3D-IC Design Barriers with GENIO
by Mike Gianfagna on 11-27-2024 at 10:00 am
Categories: 3D IC, EDA, MZ Technologies

MZ Technologies is Breaking Down 3D IC Design Barriers with GENIO

3D-IC design can be both exciting and frustrating. It’s exciting because it opens a new world of innovation possibilities – opportunities that aren’t constrained by the rules of monolithic chip scaling. It can be frustrating because of the large array of complex technical challenges that must be overcome to make this new paradigm… Read More

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Compiler Tuning for Simulator Speedup. Innovation in Verification

Compiler Tuning for Simulator Speedup. Innovation in Verification
by Bernard Murphy on 11-27-2024 at 6:00 am
Categories: AI, Cadence, EDA

Innovation New

Modern simulators map logic designs into software to compile for native execution on target hardware. Can this compile step be further optimized? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas.… Read More

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Cadence Paints a Broad Canvas in Automotive

Cadence Paints a Broad Canvas in Automotive
by Bernard Murphy on 11-25-2024 at 6:00 am
Categories: AI, Automotive, Cadence, EDA

automotive trends min

Cadence recently launched a webinar series on trends and challenges in automotive design. They contribute through IP from their Silicon Solutions Group, a comprehensive spectrum of design tooling and through collaborative development within a wide partner ecosystem. This collaboration aims to support and advance progress… Read More

Podcast EP262: How AI is Changing Semiconductor Design with Rob Knoth

Podcast EP262: How AI is Changing Semiconductor Design with Rob Knoth
by Daniel Nenni on 11-22-2024 at 10:00 am
Categories: Cadence, EDA

Dan is joined by Rob Knoth, Solutions Architect in the Strategy and New Ventures group at Cadence. He is a technologist focusing on corporate strategy and the interfaces between domain specific solutions. A key area of expertise is the digital implementation of safety critical and high reliability systems. He has extensive experience… Read More