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Calibre Vision AI at #62DAC

Calibre Vision AI at #62DAC
by Daniel Payne on 07-29-2025 at 10:00 am

calibre vision ai min

Calibre is a well-known EDA tool from Siemens that is used for physical verification, but I didn’t really know how AI technology was being used, so I attended a Tuesday session at #62DAC to get up to speed. Priyank Jain, Calibre Product Management presented slides and finished up with a Q&A session.

In the semiconductor world… Read More


Enabling the Ecosystem for True Heterogeneous 3D IC Designs

Enabling the Ecosystem for True Heterogeneous 3D IC Designs
by Kalar Rajendiran on 07-28-2025 at 10:00 am

The Shift to System Technology Co Optimization

The demand for higher performance, greater configurability, and more cost-effective solutions is pushing the industry toward heterogeneous integration and 3D integrated circuits (3D ICs). These solutions are no longer reserved for niche applications—they are rapidly becoming essential to mainstream semiconductor design.… Read More


Scaling 3D IC Technologies – Siemens Hosts a Meeting of the Minds at DAC

Scaling 3D IC Technologies – Siemens Hosts a Meeting of the Minds at DAC
by Mike Gianfagna on 07-24-2025 at 6:00 am

Scaling 3D IC Technologies – Siemens Hosts a Meeting of the Minds at DAC

3D IC was a very popular topic at DAC. The era of heterogeneous, multi-chip design is here.  There were a lot of research results and practical examples presented. What stood out for me was a panel at the end of day two of DAC that was hosted by Siemens. This panel brought together an impressive group of experts to weigh in on what was really… Read More


Siemens Proposes Unified Static and Formal Verification with AI

Siemens Proposes Unified Static and Formal Verification with AI
by Bernard Murphy on 07-23-2025 at 6:00 am

Siemens Proposes Unified Static and Formal Verification with AI min

Given my SpyGlass background I always keep an eye out for new ideas that might be emerging in static and formal verification. Whatever can be covered through stimulus-free analysis reduces time that needn’t be wasted in dynamic analysis, also adding certainty to coverage across that range. Still, advances don’t come easily. … Read More


Protecting Sensitive Analog and RF Signals with Net Shielding

Protecting Sensitive Analog and RF Signals with Net Shielding
by Admin on 07-21-2025 at 6:00 am

fig1 net shielding 72dpi

By Hossam Sarhan

Communication has become the backbone of our modern world, driving the rapid growth of the integrated circuit (IC) industry, particularly in communication and automotive applications. These applications have increased the demand for high-performance analog and radio frequency (RF) designs.

However, designing… Read More


Improve Precision of Parasitic Extraction for Digital Designs

Improve Precision of Parasitic Extraction for Digital Designs
by Admin on 07-15-2025 at 10:00 am

fig1 pex process

By Mark Tawfik

Parasitic extraction is essential in integrated circuit (IC) design, as it identifies unintended resistances, capacitances, and inductances that can impact circuit performance. These parasitic elements arise from the layout and interconnects of the circuit and can affect signal integrity, power consumption,… Read More


Revolutionizing Simulation Turnaround: How Siemens’ SmartCompile Transforms SoC Verification

Revolutionizing Simulation Turnaround: How Siemens’ SmartCompile Transforms SoC Verification
by Kalar Rajendiran on 07-08-2025 at 10:00 am

SmartCompile

In the race to deliver ever-larger SoCs under shrinking schedules, simulation is becoming a bottleneck. With debug cycles constrained by long iteration times—even for minor code changes—teams are finding traditional flows too rigid and slow. The problem is further magnified in continuous integration and continuous deployment… Read More


Siemens EDA Unveils Groundbreaking Tools to Simplify 3D IC Design and Analysis

Siemens EDA Unveils Groundbreaking Tools to Simplify 3D IC Design and Analysis
by Kalar Rajendiran on 07-01-2025 at 10:00 am

Innovator3D IC Solution Suite

In a major announcement at the 2025 Design Automation Conference (DAC), Siemens EDA introduced a significant expansion to its electronic design automation (EDA) portfolio, aimed at transforming how engineers design, validate, and manage the complexity of next-generation three-dimensional integrated circuits (3D ICs).… Read More


Jitter: The Overlooked PDN Quality Metric

Jitter: The Overlooked PDN Quality Metric
by Admin on 06-30-2025 at 6:00 am

Figure 1 – Accumulated jitter

Bruce Caryl is a Product Specialist with Siemens EDA

The most common way to evaluate a power distribution network is to look at its impedance over the effective frequency range. A lower impedance will produce less noise when transient current is demanded by the IC output buffers. However, this transient current needs to be provided… Read More


DAC News – A New Era of Electronic Design Begins with Siemens EDA AI

DAC News – A New Era of Electronic Design Begins with Siemens EDA AI
by Mike Gianfagna on 06-23-2025 at 10:00 am

DAC News – A New Era of Electronic Design Begins with Siemens EDA AI

AI is the centerpiece of DAC this year. How to design chips to bring AI algorithms to life, how to prevent AI from hacking those chips, and of course how to use AI to design AI chips. In this latter category, there were many presentations, product announcements and demonstrations. I was impressed by many of them. But an important observation… Read More