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How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late

How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late
by Mike Gianfagna on 06-25-2026 at 10:00 am

How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late

Embedded systems programs often fail because critical engineering documentation drifts out of alignment over time and distance. This results in a team that is correctly following the wrong instructions. All forms of engineering documentation suffer from this problem, and it really is the silent killer of many programs.

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COMPUTEX 2026: S2C and Andes Technology Showcase Hardcore “EDA+IP” Synergy for the AI Era

COMPUTEX 2026: S2C and Andes Technology Showcase Hardcore “EDA+IP” Synergy for the AI Era
by Daniel Nenni on 06-25-2026 at 6:00 am

AX66

COMPUTEX 2026 officially concluded under the theme “AI Together,” bringing the global semiconductor and computing ecosystem together to showcase the latest advances in artificial intelligence, HPC, and intelligent systems. While AI accelerators and advanced computing platforms dominated the exhibition floor, one collaboration… Read More


The Wedding of the Year: Why AI Infrastructure Financing Is Becoming a Semiconductor Story

The Wedding of the Year: Why AI Infrastructure Financing Is Becoming a Semiconductor Story
by Jonah McLeod on 06-24-2026 at 2:00 pm

Open AI Illustration

Every family has that one wedding where, halfway through the toasts, someone leans over and whispers “wait, who’s paying for all this?” This is that wedding. OpenAI and Broadcom are the happy couple. Apollo Global Management walked the bride down the aisle. Nvidia may have just stood up to offer a toast, a very… Read More


All-Embracing Multiphysics Analysis for Chiplet-Based Systems

All-Embracing Multiphysics Analysis for Chiplet-Based Systems
by Bernard Murphy on 06-24-2026 at 6:00 am

Revised multiphysics graphic

What systems can accomplish by combining semiconductors, AI, and software seems at times boundless. Chiplet-based semiconductors deliver this promise, allowing a myriad of complex digital, memory, analog and photonic functions to be condensed into a single semiconductor package for higher performance, lower power consumption… Read More


How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26

How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26
by Mike Gianfagna on 06-23-2026 at 6:00 am

How Samtec Blazes a Trail to 224:448 Gbps at DesignCon 26

I recently covered what Samtec was doing at DesignCon 26. Samtec has a tendency to dominate any show it attends in multiple dimensions. The prior post focused on the company’s contributions to the technical agenda and the high-profile experts in attendance. While all that is interesting and valuable, attending a large show like… Read More


Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late

Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late
by Mike Gianfagna on 06-18-2026 at 8:00 am

Webinar Caspia Shows You How to Fix Security Flaws Before It’s Too Late

I recently posted an overview of an upcoming webinar from Caspia Technologies. That post provides background on the excellent speakers who will present and an overview of the topics they will cover.  I recently had the opportunity to attend a dry run of the entire event. The details presented are quite impactful, so I thought I’d… Read More


Feed Forward Intelligence: Enabling Testability in the Chiplets Era

Feed Forward Intelligence: Enabling Testability in the Chiplets Era
by Kalar Rajendiran on 06-18-2026 at 6:00 am

Data Feed Forward Architecture

The semiconductor industry is entering a new era in which advanced packaging and chiplets-based architectures are becoming the primary drivers of system-level innovation. As traditional process-node scaling becomes increasingly complex and expensive, manufacturers are turning to heterogeneous integration, combining… Read More


A tower-like heterogeneous packaging architecture for the AI era

A tower-like heterogeneous packaging architecture for the AI era
by Moh Kolb on 06-16-2026 at 6:00 am

Picture1 VTEMC

For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More


Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner

Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner
by Kalar Rajendiran on 06-15-2026 at 6:00 am

ESDA Panel Session June 10, 2026 IMG 6708

Highlights from a recent panel session moderated by Ed Sperling (Semiconductor Engineering) featuring Walden Rhines (Silvaco), Vincent Wong (Verific), Dave Kelf (Breker Verification Systems), Shelly Henry (MooresLab AI), Ann Wu (Silimate), and Cindy Cui (ChipAgents). The panel session was hosted by Electronic System … Read More


WEBINAR: Engineering Documentation is a Critical Source of Truth – Do You Know if it’s Accurate?

WEBINAR: Engineering Documentation is a Critical Source of Truth – Do You Know if it’s Accurate?
by Mike Gianfagna on 06-11-2026 at 8:00 am

llmda homepage block (2)

Embedded systems programs rarely fail because of a lack of execution capability. They fail because critical engineering documentation drifts out of alignment over time and distance. Simply put, the team is correctly following the wrong instructions. This includes requirements, architecture, implementation, verification,… Read More