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NanoIC Extends Its PDK Portfolio with First A14 Logic and eDRAM Memory PDK

NanoIC Extends Its PDK Portfolio with First A14 Logic and eDRAM Memory PDK
by Daniel Nenni on 02-04-2026 at 6:00 am

Nano IC TSMC Process Roadmap

NanoIC has announced a major expansion of its process design kit portfolio with the introduction of its first A14 logic and embedded eDRAM  memory PDK. This milestone reflects the company’s growing role in enabling advanced semiconductor design at cutting-edge technology nodes and addresses increasing industry demand for… Read More


How Switzerland Built a Global Semiconductor Edge by Thinking Smaller

How Switzerland Built a Global Semiconductor Edge by Thinking Smaller
by Admin on 02-03-2026 at 8:00 am

Alain Serge Porret Headshot

By Alain-Serge Porret, Vice President, Integrated & Wireless Systems, CSEM

Since ramping up several years ago, the global semiconductor and artificial intelligence (AI) race has been driven by scale, from building larger data centers, developing bigger and more powerful models, and with them, increasingly complex and… Read More


The 71st International Electron Devices Meeting (IEDM 2025)

The 71st International Electron Devices Meeting (IEDM 2025)
by Daniel Nenni on 02-03-2026 at 6:00 am

IEDM 2025 SemiWiki

It is hard to believe this conference is older than most all of the participants, including myself. The amount of history behind this conference is amazing. Back in 1955 the meeting began as the Electron Devices Meeting (EDM), organized by what later became the IEEE Electron Devices Society. Its core purpose was to bring together… Read More


Podcast EP329: How Marvell is Addressing the Power Problem for Advanced Data Centers with Mark Kuemerle

Podcast EP329: How Marvell is Addressing the Power Problem for Advanced Data Centers with Mark Kuemerle
by Daniel Nenni on 01-30-2026 at 10:00 am

Daniel is joined by Mark Kuemerle, Vice President of Technology, Custom Cloud Solutions at Marvell. Mark is responsible for defining leading-edge ASIC offerings and architects system-level solutions. Before joining Marvell, Mark was a Fellow in Integrated Systems Architecture at GLOBALFOUNDRIES and has held multiple engineering… Read More


2025 Retrospective. Innovation in Verification

2025 Retrospective. Innovation in Verification
by Bernard Murphy on 01-29-2026 at 6:00 am

Innovation New

As usual in January we start with a look back at the papers we reviewed last year. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas. As always, feedback welcome.

Looking back at 2025

Read More

Synopsys’ Secure Storage Solution for OTP IP

Synopsys’ Secure Storage Solution for OTP IP
by Kalar Rajendiran on 01-28-2026 at 6:00 am

Synopsys Secure Storage Solution for OTP IP

For decades, One-Time Programmable (OTP) memory has been viewed as a foundational element of hardware security. Because OTP can be written only once and cannot be modified afterward, it has traditionally been trusted to store cryptographic keys, secure boot code, device identity, and configuration data. Permanence was often… Read More


Hierarchical Device Planning as an Enabler of System Technology Co-Optimization

Hierarchical Device Planning as an Enabler of System Technology Co-Optimization
by Kalar Rajendiran on 01-27-2026 at 6:00 am

Connectivity in a Hierarchical IC Package Floorplan

AI, hyperscale data centers, and data-intensive workloads are driving unprecedented demands for performance, bandwidth, and energy efficiency. As the economic returns of traditional transistor scaling diminish, advanced IC packaging and heterogeneous integration have become the primary levers for system-level scaling.… Read More


Agentic at the Edge in Automotive and Industry

Agentic at the Edge in Automotive and Industry
by Bernard Murphy on 01-26-2026 at 6:00 am

Agentic at the edge

It might seem from popular debate around AI and agentic that everything in this field is purely digital, initiated through text or voice prompts, often cloud-based or on-prem. But that view misses so much. AI is already an everyday experience at the edge, for voice-based control, in object detection and safety-triggered braking… Read More


Podcast EP328:A Brief History of Chip Design and AI with Dr. Bernard Murphy

Podcast EP328:A Brief History of Chip Design and AI with Dr. Bernard Murphy
by Daniel Nenni on 01-23-2026 at 10:00 am

Daniel is joined by Dr. Bernard Murphy, a friend and fellow blogger on SemiWiki.

Dan explores some key milestones in Bernard’s journey in semiconductors and EDA, beginning with a focus on nuclear physics. Bernard explains how he developed an interest in AI technology and applications. In this broad and informative discussion,… Read More


Arteris Smart NoC Automation: Accelerating AI-Ready SoC Design in the Era of Chiplets

Arteris Smart NoC Automation: Accelerating AI-Ready SoC Design in the Era of Chiplets
by Daniel Nenni on 01-22-2026 at 6:00 am

Smart NoC Automation Accelerating AI Ready SoC Design in the Era of Chiplet

As semiconductor design pushes into increasingly complex territory, driven by Ai, ML, HPC, and heterogeneous system architectures, designers are challenged to balance performance, power, and time-to-market pressures. In this landscape, network-on-chip (NoC) architectures have emerged as a foundational building block… Read More