IMGTC Webinar SemiWIki
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The Intelligence Revolution: TSMC’s OIP Ecosystem Forges the Path to Trillion-Transistor AI Systems

The Intelligence Revolution: TSMC’s OIP Ecosystem Forges the Path to Trillion-Transistor AI Systems
by Kalar Rajendiran on 09-23-2026 at 2:00 pm

Broadest Portfolio of Silicon Validated IP

At the 2026 OIP Ecosystem Forum, the industry narrative shifted from incremental scaling to what TSMC defines as the “Intelligence Revolution.” Akin to the 18th-century Industrial Revolution which transitioned human physical labor to mechanical power, the current era is augmenting human ingenuity through … Read More


Beyond the Accelerator: Why Silicon Challengers Must Transition to Full-System Infrastructure

Beyond the Accelerator: Why Silicon Challengers Must Transition to Full-System Infrastructure
by Kalar Rajendiran on 09-22-2026 at 2:00 pm

Image for Article 1 SemiWiki Silicon to Systems

The recent AI Infra Summit was exceptionally jam-packed, filled to the brim with compelling talks, overlapping tracks, and emerging technologies. Amid the noise of the event, there were many excellent presentations detailing the physical realities of scaling hardware. But one presentation in particular caught my attention… Read More


Broadcom’s AI Engine Shifts Into Overdrive

Broadcom’s AI Engine Shifts Into Overdrive
by Daniel Nenni on 09-20-2026 at 8:00 am

The XPU Effect Broadcom AI

Broadcom’s fiscal third-quarter 2026 results show how artificial-intelligence infrastructure is shifting from general-purpose acceleration toward customized compute and large-scale networking. The company reported AI semiconductor revenue of $16.7 billion, up 221% year over year and 54% sequentially. That expansion… Read More


Podcast EP366: How Cognichip is Changing Chip Design with Faraj Aalaei

Podcast EP366: How Cognichip is Changing Chip Design with Faraj Aalaei
by Daniel Nenni on 09-16-2026 at 10:00 am

Daniel is joined by the CEO of Cognichip, Faraj Aalaei, a successful visionary entrepreneur with over 40 years of distinguished experience in communications and networking technologies. As a leading entrepreneur in Silicon Valley, he was responsible for building and leading two semiconductor companies through IPOs as a founder… Read More


Nvidia Sees AGI While OpenAI Sees Danger

Nvidia Sees AGI While OpenAI Sees Danger
by Daniel Nenni on 09-13-2026 at 10:00 am

Nvidia Sees AGI While OpenAI Sees Danger

Jensen Huang’s declaration that “AGI has arrived” is less a scientific verdict than a compressed statement about infrastructure, economics and momentum. His evidence is OpenAI’s GPT-6 Astra, reportedly trained on more than 100,000 Nvidia Grace Blackwell NVL72 systems, followed by a promise that another 400,000 GPUs are coming… Read More


TSMC’s 2026 OIP Forum to Spotlight the Technologies Shaping the Next Era of Chips

TSMC’s 2026 OIP Forum to Spotlight the Technologies Shaping the Next Era of Chips
by Daniel Nenni on 09-11-2026 at 6:00 am

TSMC OIP 2026

It’s that time of year again. Time certainly flies when AI is chasing you! This year marks the 18th TSMC OIP Ecosystem Forum, and it promises to be bigger and better than ever. My SemiWiki partners, Mike Gianfagna and Kalar Rajendiran, will join me in covering the event live, so stay tuned for all the news that’s fit to print.

Mike and… Read More


Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success

Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success
by Mike Gianfagna on 09-10-2026 at 2:00 pm

Webinar – Avestra Explains How to Achieve Assertion Driven Silicon Success

Studies have shown that nearly 20% of the verification cycle is spent on assertion generation, debugging, and methodology integration. This work remains largely manual today or is delegated to general-purpose LLMs that can produce incorrect assertions more than 30% of the time. Avestra attacks this problem with agentic AI … Read More


Webinar – ChipAgents Shows You How to Break the Timing Closure Bottleneck with AI

Webinar – ChipAgents Shows You How to Break the Timing Closure Bottleneck with AI
by Mike Gianfagna on 09-10-2026 at 6:00 am

Webinar – ChipAgents Shows You How to Break the Timing Closure Bottleneck with AI

We all know timing closure is one of the most challenging processes in chip design. Extracting actionable insight from massive timing reports, tracing violations back to RTL, and selecting the right fix across complex PPA tradeoffs all require deep expertise. And every change can trigger hours or days of tool runs and cross-team… Read More


Jalapeño Hot Chip, Cool Power Bill: OpenAI Turns Up the Heat on AI Inference

Jalapeño Hot Chip, Cool Power Bill: OpenAI Turns Up the Heat on AI Inference
by Daniel Nenni on 09-09-2026 at 2:00 pm

Jalapeño Hot Chip

OpenAI’s Jalapeño is a custom accelerator designed specifically for AI inference, particularly the low-latency, multi-chip workloads behind interactive and agentic systems. Its central idea is that useful performance cannot be reduced to peak floating-point operations or memory bandwidth. What matters is how quickly … Read More


The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response

The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response
by Kalar Rajendiran on 09-04-2026 at 6:00 am

2025 Design IP Sub Categories Market Share Pie Chart

While semiconductor design intellectual property (IP) is a $9.45 billion market, it acts as the absolute architectural bottleneck for the entire global semiconductor value chain. The choices made at the IP layer today dictate the cost, power, and security of a downstream technology economy rapidly marching toward a trillion… Read More