TSMC Advanced Packaging Overcomes the Complexities of Multi-Die Design

TSMC Advanced Packaging Overcomes the Complexities of Multi-Die Design
by Mike Gianfagna on 06-10-2024 at 6:00 am

TSMC Advanced Packaging Overcomes the Complexities of Multi Die Design

The TSMC Technology Symposium provides a worldwide stage for TSMC to showcase its advanced technology impact and the extensive ecosystem that is part of the company’s vast reach. These events occur around the world and the schedule is winding down. TSMC covers many topics at its Technology Symposium, including industry-leading… Read More


Arteris is Solving SoC Integration Challenges

Arteris is Solving SoC Integration Challenges
by Mike Gianfagna on 06-06-2024 at 6:00 am

Arteris is Solving SoC Integration Challenges

The difficulty of SoC integration is clearly getting more demanding. Driven by process node density, multi-chip integration and seemingly never-ending demands for more performance at lower power, the hurdles continue to increase. When you consider these challenges in the context of Arteris, it’s natural to think about hardware… Read More


Silicon Creations is Enabling the Chiplet Revolution

Silicon Creations is Enabling the Chiplet Revolution
by Mike Gianfagna on 06-04-2024 at 6:00 am

Silicon Creations is Enabling the Chiplet Revolution

The multi-die chiplet-based revolution is upon us. The ecosystem will need to develop various standards and enabling IP to make the “mix and max” concept a reality. UCIe, or Universal Chip Interconnect express is an open, multi-protocol on-package die-to-die interconnect and protocol standard that promises to pave the way … Read More


Follow the Leader – Synopsys Provides Broad Support for Processor Ecosystems

Follow the Leader – Synopsys Provides Broad Support for Processor Ecosystems
by Mike Gianfagna on 06-03-2024 at 6:00 am

Follow the Leader – Synopsys Provides Broad Support for Processor Ecosystems

Synopsys has expanded its ARC processor portfolio to include a family of RISC-V processors. This was originally reported on SemiWiki last October. There is also a recent in-depth article on the make-up of the ARC-V family on SemiWiki here. This is important and impactful news; I encourage you to read these articles if you haven’t… Read More


Secure-IC Presents AI-Powered Cybersecurity

Secure-IC Presents AI-Powered Cybersecurity
by Mike Gianfagna on 05-29-2024 at 10:00 am

Secure IC Presents AI Powered Cybersecurity

Design & Reuse held its IP-SoC Silicon Valley 24 event on April 25th, 2024, at the Hyatt Regency Santa Clara. The agenda was packed with many relevant and compelling presentations from companies large and small. I attended one presentation on security that stood out for me. Secure-IC presented “AI-powered cybersecurity:Read More


Webinar – CHERI: Fine-Grained Memory Protection to Prevent Cyber Attacks

Webinar – CHERI: Fine-Grained Memory Protection to Prevent Cyber Attacks
by Mike Gianfagna on 05-27-2024 at 6:00 am

Webinar – CHERI Fine Grained Memory Protection to Prevent Cyber Attacks

Cyber attacks are top of mind for just about everyone these days. As massive AI data sets become more prevalent (and more valuable), data security is no longer “nice to have”. Rather, it becomes critical for continued online operation and success. The AI discussion is a double-edged sword as well. While AI enables many new and life-changing… Read More


Sarcina Teams with Keysight to Deliver Advanced Packages

Sarcina Teams with Keysight to Deliver Advanced Packages
by Mike Gianfagna on 05-23-2024 at 10:00 am

Sarcina Teams with Keysight to Deliver Advanced Packages

All aspects of semiconductor design and manufacturing require collaboration across a global ecosystem. As complexity increases, so does the importance of good collaboration. This is especially true for advanced package design. Thanks to the movement to multi-die design, package development has become an incredibly difficult… Read More


How to Find and Fix Soft Reset Metastability

How to Find and Fix Soft Reset Metastability
by Mike Gianfagna on 05-20-2024 at 6:00 am

How to Find and Fix Soft Reset Metastability

Most of us are familiar with the metastability problems that can be caused by clock domain crossings (CDC). Early static analysis techniques can flag these kinds of issues to ensure there are no surprises later. I spent quite a bit of time at Atrenta, the SpyGlass company, so I am very familiar with these challenges. Due to the demands… Read More


A Webinar with Silicon Catalyst, ST Microelectronics and an Exciting MEMS Development Contest

A Webinar with Silicon Catalyst, ST Microelectronics and an Exciting MEMS Development Contest
by Mike Gianfagna on 05-17-2024 at 8:00 am

A Webinar with Silicon Catalyst, ST Microelectronics and an Exciting MEMS Development Contest

Most MEMS and sensor companies struggle to find an industrialization partner that can support early-stage research and help develop and transition unique concepts to high-volume production. The wrong partner means delays and increased development costs as the design moves between various facilities. Recently, Silicon … Read More


Synopsys Accelerates Innovation on TSMC Advanced Processes

Synopsys Accelerates Innovation on TSMC Advanced Processes
by Mike Gianfagna on 05-15-2024 at 10:00 am

Synopsys Accelerates Innovation on TSMC Advanced Processes

We all know that making advanced semiconductors is a team sport. TSMC can innovate the best processes, but without the right design flows, communication schemes and verified IP it becomes difficult to access those processes. Synopsys recently announced some details on this topic. It covers a lot of ground. The graphic at the top… Read More