The multi-die chiplet-based revolution is upon us. The ecosystem will need to develop various standards and enabling IP to make the “mix and max” concept a reality. UCIe, or Universal Chip Interconnect express is an open, multi-protocol on-package die-to-die interconnect and protocol standard that promises to pave the way … Read More
Author: Mike Gianfagna
Silicon Creations is Enabling the Chiplet Revolution
Follow the Leader – Synopsys Provides Broad Support for Processor Ecosystems
Synopsys has expanded its ARC processor portfolio to include a family of RISC-V processors. This was originally reported on SemiWiki last October. There is also a recent in-depth article on the make-up of the ARC-V family on SemiWiki here. This is important and impactful news; I encourage you to read these articles if you haven’t… Read More
Secure-IC Presents AI-Powered Cybersecurity
Design & Reuse held its IP-SoC Silicon Valley 24 event on April 25th, 2024, at the Hyatt Regency Santa Clara. The agenda was packed with many relevant and compelling presentations from companies large and small. I attended one presentation on security that stood out for me. Secure-IC presented “AI-powered cybersecurity:… Read More
Webinar – CHERI: Fine-Grained Memory Protection to Prevent Cyber Attacks
Cyber attacks are top of mind for just about everyone these days. As massive AI data sets become more prevalent (and more valuable), data security is no longer “nice to have”. Rather, it becomes critical for continued online operation and success. The AI discussion is a double-edged sword as well. While AI enables many new and life-changing… Read More
Sarcina Teams with Keysight to Deliver Advanced Packages
All aspects of semiconductor design and manufacturing require collaboration across a global ecosystem. As complexity increases, so does the importance of good collaboration. This is especially true for advanced package design. Thanks to the movement to multi-die design, package development has become an incredibly difficult… Read More
How to Find and Fix Soft Reset Metastability
Most of us are familiar with the metastability problems that can be caused by clock domain crossings (CDC). Early static analysis techniques can flag these kinds of issues to ensure there are no surprises later. I spent quite a bit of time at Atrenta, the SpyGlass company, so I am very familiar with these challenges. Due to the demands… Read More
A Webinar with Silicon Catalyst, ST Microelectronics and an Exciting MEMS Development Contest
Most MEMS and sensor companies struggle to find an industrialization partner that can support early-stage research and help develop and transition unique concepts to high-volume production. The wrong partner means delays and increased development costs as the design moves between various facilities. Recently, Silicon … Read More
Synopsys Accelerates Innovation on TSMC Advanced Processes
We all know that making advanced semiconductors is a team sport. TSMC can innovate the best processes, but without the right design flows, communication schemes and verified IP it becomes difficult to access those processes. Synopsys recently announced some details on this topic. It covers a lot of ground. The graphic at the top… Read More
How Samtec Helps Achieve 224G PAM4 in the Real World
224 Gbps PAM4 gets attention for applications such as data center, AI/ML, accelerated computing, instrumentation and test and measurement. The question is how real is it and what are the challenges that need to be overcome to implement reliable channels at that data rate? If you wonder about these kinds of topics for your next design,… Read More
Siemens EDA Makes 3D IC Design More Accessible with Early Package Assembly Verification
2.5D and 3D ICs present special challenges since these designs contain multiple chiplets of different materials integrated in all three dimensions. This complexity demands full assembly verification of the entire stack, considering all the subtle electrical and physical interactions of the complete system. Identifying… Read More
The Chip 4: A Semiconductor Elite