How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation
by Mike Gianfagna on 01-15-2024 at 6:00 am

How Codasip Unleashed CHERI and Created a Paradigm Shift for Secured Innovation

At the recent RISC-V Summit, Dr. Ron Black, CEO of Codasip unveiled a significant new capability to create a more secure environment for innovation. Rather than re-writing trillions of lines of code to solve the security problem, Ron described a much more practical approach. One that brought a research topic into mainstream deployment.… Read More


Analog Bits Enables the Migration to 3nm and Beyond

Analog Bits Enables the Migration to 3nm and Beyond
by Mike Gianfagna on 01-10-2024 at 6:00 am

Analog Bits Enables the Migration to 3nm and Beyond

The world is abuzz with 3nm and 2nm technology availability. These processes offer the opportunity to pack far more on a single die than ever before. The complex digital systems contemplated will bring new AI algorithms to life and much more. But there is another side of the technology migration story.  With all that digital processing… Read More


Achieving a Unified Electrical/Mechanical PCB Design Flow – The Siemens Digital Industries Software View

Achieving a Unified Electrical/Mechanical PCB Design Flow – The Siemens Digital Industries Software View
by Mike Gianfagna on 12-28-2023 at 10:00 am

Achieving a Unified Electrical:Mechanical PCB Design Flow – The Siemens Digital Industries Software View

Let’s face it, designs are getting harder, much harder. Gone are the days when the electrical and mechanical design of a system occurred separately. Maybe ten years ago this practice was acceptable. Once the electrical design was completed (either the chip or the board) the parameters associated with the design were then given… Read More


SPIE 2023 Buzz – Siemens Aims to Break Down Innovation Barriers by Extending Design Technology Co-Optimization

SPIE 2023 Buzz – Siemens Aims to Break Down Innovation Barriers by Extending Design Technology Co-Optimization
by Mike Gianfagna on 12-26-2023 at 6:00 am

SPIE 2023 Buzz – Siemens Aims to Break Down Innovation Barriers by Extending Design Technology Co Optimization

Preventing the propagation of systematic defects in today’s semiconductor design-to-fabrication process requires many validation, analysis and optimization steps. Tools involved in this process can include design rule checking (DRC), optical proximity correction (OPC) verification, mask writing and wafer printing… Read More


Giving Back – The Story of One Silicon Valley Veteran’s Journey

Giving Back – The Story of One Silicon Valley Veteran’s Journey
by Mike Gianfagna on 12-22-2023 at 6:00 am

Giving Back – The Story of One Silicon Valley Veteran’s Journey

The concept of giving back is something many of us have contemplated. Giving back to the community or to support a particular cause. How to respond to those inquiries from our alma mater is another example. These conversations typically focus on giving money to provide needed support. As engineers, we are surrounded by a massive… Read More


Seven Silicon Catalyst Companies to Exhibit at CES, the Most Powerful Tech Event in the World

Seven Silicon Catalyst Companies to Exhibit at CES, the Most Powerful Tech Event in the World
by Mike Gianfagna on 12-21-2023 at 6:00 am

Seven Silicon Catalyst Companies to Exhibit at CES, the Most Powerful Tech Event in the World

According to its website, CES® Is the global stage for innovation, delivering the most powerful tech event in the world — the proving ground for breakthrough technologies and global innovators. Owned and produced by the Consumer Technology Association (CTA)®, it is the only trade show that showcases the entire tech landscape… Read More


RISC-V Summit Buzz – Launchpad Showcase Highlights Smaller Company Innovation

RISC-V Summit Buzz – Launchpad Showcase Highlights Smaller Company Innovation
by Mike Gianfagna on 12-19-2023 at 8:00 am

RISC V Summit Buzz – Launchpad Showcase Highlights Smaller Company Innovation

One of the goals of the recent RISC-V Summit was to demonstrate that the RISC-V movement is real – major programs by large organizations committing to development around the RISC-V ISA. I would say this goal was achieved. Many high-profile announcements and aggressive, new architectures based on RISC-V were presented. On day … Read More


Samtec Welcomes You to the Future with Proven 224G PAM4 Interconnect Solutions

Samtec Welcomes You to the Future with Proven 224G PAM4 Interconnect Solutions
by Mike Gianfagna on 12-18-2023 at 8:00 am

Samtec Welcomes You to the Future with Proven 224G PAM4 Interconnect Solutions

We all know about the relentless march of Moore’s Law. Denser, faster, and cheaper semiconductor devices that fuel the innovations that surround us. For this discussion, I will lump the significant movement from single chip advances to multi-chip strategies into a single thread as devices continue to get smaller, faster and … Read More


IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation
by Mike Gianfagna on 12-10-2023 at 2:00 pm

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

For more than 65 years, the IEEE International Electron Devices Meeting (IEDM) has been the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. As I post this, the conference is underway in San Francisco… Read More


RISC-V Summit Buzz – Axiomise Accelerates RISC-V Designs with Next Generation formalISA®

RISC-V Summit Buzz – Axiomise Accelerates RISC-V Designs with Next Generation formalISA®
by Mike Gianfagna on 12-04-2023 at 6:00 am

RISC V Summit Buzz – Axiomise Accelerates RISC V Designs with Next Generation formalISA®

If the recent RISC-V Summit proved one thing it’s that open-source hardware design, and particularly the RISC-V instruction set architecture (ISA) has entered the mainstream. It is a design methodology and architecture to watch closely. Across a broad range of applications from data center, to automotive, to IoT, RISC-V processors… Read More