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“It’s time for the big ship of Moore’s Law to make a turn from space to time” is a nonconformist message that surprised me when I read the book “The Turn of Moore’s Law from Space to Time” by Mr. Liming Xiu.
As a forty-year veteran and as an author of several books on the semiconductor industry myself, I am quite familiar with all contemporary… Read More
Most people will be surprised by this but after working in Taiwan for many years I quite expected it. Intel Announced that MediaTek will use Intel Foundry Services for FinFET based smart edge device chips. MediaTek will start with Intel 16nm technology which originated from the legendary 22nm, the first commercial FinFET process.… Read More
Dr. Jaushin Lee is the founder and CEO of Zentera Systems. He is the visionary architect behind the award-winning Zentera CoIP (Cloud over IP) platform that enables enterprises to dramatically accelerate their journey to Zero Trust security. Jaushin brings 20 years of management and executive experience in networking and computer… Read More
Shai Cohen is an entrepreneur and industry veteran, with vast experience in building technology companies from the ground up. He is a co-founder and CEO of proteanTecs, which develops revolutionary Universal Chip Telemetry™ for electronic systems throughout their entire lifecycle. Prior to founding proteanTecs, Shai co-founded… Read More
Barry Paterson is the CEO of UK-based analog IP pioneer, Agile Analog. He has held senior leadership, engineering and product management roles at Dialog Semiconductor and Wolfson Microelectronics. He has been involved in the development of custom, mixed-signal silicon solutions for many of the leading mobile and consumer … Read More
The Design Automation Conference has been the pinnacle for semiconductor design for almost 60 years. This year will be my 38th DAC and I can’t wait to see everyone again. One of the companies I will be spending time with this year is Altair.
Last month Altair acquired our friends at Concept Engineering, the leading provider… Read More
Building a multi-FPGA prototype for SoC verification is complex with many interdependent parts – and is “always on a clock”. The best multi-FPGA prototype implementation is worthless if its not up and running early in the SoC design cycle, where it offers the highest verification ROI terms of minimizing the cost of bug fixes … Read More
Chiplets are hot now as a way to extend Moore’s Law, dividing functionality across multiple die within a single package. It’s no longer practical to jam all functionality onto a single die in the very latest processes, exceeding reticle limits in some cases and in others straining cost/yield. This is not an academic concern. Already… Read More
3D-ICs bring together multiple silicon dies into a single package that’s significantly larger and complex than traditional systems on a chip (SoCs). There’s no doubt these innovative designs are revolutionizing the semiconductor industry.
3D-ICs offer a variety of performance advantages over traditional SoCs. Because … Read More
Recently, in one of my regular check-ins with AMIQ EDA, I was pleased that they linked me up with an active customer. The resulting post summarized my discussion with three engineers from Kepler Communications Inc. They talked about using one of the AMIQ EDA products in the design of FPGAs for space-borne Internet connectivity.… Read More
Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business