As chipmakers put more computing power into a single system, the challenge extends beyond making individual chips faster. They must connect multiple chips, memory stacks, power supplies, and sometimes optical components in a compact package. In the2026 TSMC OIP Forum talk “Addressing Inter-Die Complexity for 3D Multi-Die… Read More
CEO Interview with Sunghyun Park of RebellionsDr. Sunghyun Park earned his B.S. from KAIST…Read More
Tokens Per Watt Over Peak Performance: Retrofitting Heterogeneous Silicon for Production Inference👉 This is Part 2 of an editorial…Read More
S2C Prodigy Complete Prototyping Solutions—and Why They MatterModern system-on-chip (SoC) and application-specific integrated circuit (ASIC)…Read MorePollen Metrology: From a Decade-Long Bet to a Proven AI Platform for Semiconductor Manufacturing
Recently, I had the opportunity to speak with Johann Foucher, founder and CEO of Pollen Metrology, a French company whose journey offers a rare vantage point on how artificial intelligence is reshaping semiconductor manufacturing from the inside out. What makes Pollen Metrology’s story compelling isn’t just … Read More
Managing Power, Performance and Reliability in the Chiplet Era
Next-gen AI accelerators, high-performance processors, and complex computing architectures depend heavily on advanced packaging. Bringing multiple dies, chiplets, high-bandwidth memory, and advanced interconnects together into a single 2.5D or 3D package yields massive performance gains. However, this design evolution… Read More
Siemens and TSMC push AI deeper into chip design
Siemens and TSMC are expanding their collaboration on semiconductor design tools, with a focus on AI assisted workflows, advanced chip packaging and support for newer manufacturing processes. Their announcement centers on an AI agent intended to find and fix design rule violations: errors that can prevent a chip layout from… Read More
Agentic AI Can Reach GDS. What Must It Prove Before Engineers Trust It for Tapeout?
Agentic AI is beginning to move semiconductor engineering beyond copilots and isolated task automation.
From Agentrys’ public material and recent discussion, its architecture points toward a broader engineering flow:
Specification → RTL → verification → synthesis / physical design → PPA optimization → physical verification… Read More
TSMC OIP Ecosystem Forum 2026: Opening Remarks
The 2026 TSMC Open Innovation Platform (OIP) Ecosystem Forum was held on September 23, 2026, in Santa Clara, CA. This is the event where TSMC showcases the substantial progress made with its massive semiconductor ecosystem. As one would expect, AI was a key topic throughout the day, with some very impressive results reported and… Read More
LLM-assisted schematic test-report analysis and root-cause investigation
By Piyush Bag
Intro: In this AI era, building data centers has become crucial not just for hyperscalers, but for many companies as well, as they build the infrastructure for AI. At a high level, a data center includes compute, storage, networking, and other infrastructure. This article is about the design lifecycle of network hardware.… Read More
From Frontend to the Frontiers of Silicon with Moores Lab AI
Synopsys Announces AgentEngineer Solutions and Autopilot Platform for Autonomous Engineering
Synopsys today announced its AgentEngineerTM solutions portfolio and AutopilotTM Platform, advancing a fundamental paradigm shift in electronic design automation (EDA): moving beyond AI copilots toward autonomous engineering agents. Following a recent technical briefing with Thomas Andersen, Vice President of AI and… Read More
PDF Solutions CONNECT, the Premier Event for Semiconductor Analytics and AI, October 15 and 16 in San Francisco
On October 15 and 16, 2026, in San Francisco, PDF Solutions will hold PDF Solutions CONNECT, the premier event for Semiconductor Analytics and AI. This event starts at the end of SEMICON WEST 2026 in a location in close proximity to the Moscone Center. It is a great opportunity for leading semiconductor and equipment companies attending… Read More


Why ASML Is Racing to Build 110 EUV Machines