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Podcast EP375: How to Implement Extensive Security Verification Capability Today with Dr. Farimah Farahmandi

Podcast EP375: How to Implement Extensive Security Verification Capability Today with Dr. Farimah Farahmandi
by Daniel Nenni on 10-23-2026 at 10:00 am

Daniel is joined by Dr. Farimah Farahmandi, co-founder and chief scientist for security verification at Caspia Technologies. Farimah is the  Endowed Professor in Hardware Security and Assistant Professor at the University of Florida ECE. She is the founding director of the Silicon Design and Assurance Laboratory there and… Read More


Inside the Silicon: Analog Bits N2P2 Test Chip

Inside the Silicon: Analog Bits N2P2 Test Chip
by Daniel Nenni on 10-23-2026 at 9:00 am

Crimson Chip Precision

 

The future of intelligent computing depends on silicon that delivers more performance within tighter power and thermal limits. Combining TSMC’s advanced process technology with Analog Bits’ analog and mixed-signal expertise, we help designers address those demands through local power regulation, supply monitoring, precision… Read More


WEBINAR: Cut down EDA License cost by 25% with Stratos AI Nitro

WEBINAR: Cut down EDA License cost by 25% with Stratos AI Nitro
by Daniel Nenni on 10-23-2026 at 8:00 am

Smarter EDA Queues with Stratos AI

Expensive EDA licenses should keep chip design moving. Yet when license activity and job queues live in separate systems, teams can struggle to understand why work is waiting, which tools are underused, and whether additional spending will solve the problem. Idle seats, checkout failures, and stalled jobs can consume budgets… Read More


The Wafer Is the New Battleground: Soitec CPO René Jonker on Building AI from the Substrate Up

The Wafer Is the New Battleground: Soitec CPO René Jonker on Building AI from the Substrate Up
by Lauro Rizzatti on 10-23-2026 at 7:00 am

Electric blue Soitec wafer cover

Most of the AI conversation stops at the chip. At SEMICON West 2026 I sat down with René Jonker, Chief Product Officer of Soitec, to talk about what sits underneath it.

Ask an engineer where AI performance comes from and you will hear about process nodes, dataflow, HBM stacks and interconnect fabrics. Rarely about the wafer. Yet a … Read More


From Sequential R&D to Trusted Co-Innovation: The EPIC Model for Semiconductor Innovation

From Sequential R&D to Trusted Co-Innovation: The EPIC Model for Semiconductor Innovation
by Kalar Rajendiran on 10-22-2026 at 10:00 am

Gary Dickerson on the Stage

The semiconductor industry has long depended on collaboration between technology developers, equipment suppliers and manufacturers. But as artificial intelligence reshapes computing, established ways of working together may no longer be sufficient. The next wave of innovation will depend not just on what companies develop,… Read More


Strong Electronics Growth 2026

Strong Electronics Growth 2026
by Bill Jewell on 10-22-2026 at 9:00 am

AI fuels 2026 electronics production boom

Growth in electronics production has been accelerating in 2026. Three-month-average change versus a year ago for electronics production in the U.S. was 8.1% in August 2026, continuing an accelerating growth trend since October 2025. Japan and the 27 countries of the European Union (EU 27) showed much stronger growth acceleration.… Read More


SEMICON West’s Autonomous Fab Vision Needs a Decision-Escalation Design

SEMICON West’s Autonomous Fab Vision Needs a Decision-Escalation Design
by Admin on 10-22-2026 at 8:00 am

Human approval in an AI cleanroom

By Gleb Tsipursky

SEMICON West 2026’s smart-manufacturing agenda connected digital twins, agentic AI, physical AI, and increasingly autonomous factory operations. The final day included a session on automation and equipment for autonomous facilities. At its October CONNECT conference, PDF Solutions planned demonstrations… Read More


Teradyne Targets Edge AI Test Costs With UltraFLEXplus S Series

Teradyne Targets Edge AI Test Costs With UltraFLEXplus S Series
by Daniel Nenni on 10-22-2026 at 6:00 am

Precision Testing for Edge AI Chips

Teradyne has introduced the UltraFLEXplus S series, extending its semiconductor test platform to address the manufacturing economics of edge artificial intelligence. Announced on October 12, 2026, the series begins with the UltraFLEXplus S24, a 24-slot system intended for engineering and production testing. Its target… Read More


Beyond the Post-Mortem: How yieldHUB Live Turns the Test Floor Into an Open Window

Beyond the Post-Mortem: How yieldHUB Live Turns the Test Floor Into an Open Window
by Lauro Rizzatti on 10-21-2026 at 10:00 am

Live visibility on the semiconductor test floor (1)

At SEMICON West 2026 I sat down with John O’Donnell, founder and CEO, and Gillian O’Donnell, Director of Growth, to talk about how yieldHUB Live is transforming the semiconductor test floor from a blind spot into a real-time command center.

For decades, semiconductor test floors have operated as high-stakes black… Read More


Why America’s Semiconductor Manufacturing Capacity Matters

Why America’s Semiconductor Manufacturing Capacity Matters
by Daniel Nenni on 10-21-2026 at 8:00 am

Building America's chip future

America’s semiconductor future will be shaped by its ability to turn scientific discoveries into chips manufactured at scale. That is why the investments outlined in Intel Foundry’s recent editorial matter beyond the company’s own business. They address a fundamental question: whether the United States can sustain the research,… Read More