Key Takeaways
- The semiconductor industry is shifting towards heterogeneous integration and 3D integrated circuits (3D ICs) due to demand for higher performance, configurability, and cost-effectiveness.
- System Technology Co-Optimization (STCO) allows the design of modular chiplets optimized for specific tasks, improving performance and reducing costs.
- Siemens EDA has introduced 3D IC Design Kits (3DKs) to support various design phases, including chiplet definitions, package assembly, material properties, and testing.
The demand for higher performance, greater configurability, and more cost-effective solutions is pushing the industry toward heterogeneous integration and 3D integrated circuits (3D ICs). These solutions are no longer reserved for niche applications—they are rapidly becoming essential to mainstream semiconductor design. However, their success hinges on the development of a robust ecosystem that brings together chiplet developers, foundries, OSATs, substrate suppliers, EDA vendors, and test providers. This ecosystem must support standardized workflows, interoperable tools, and reusable components to ensure seamless design, integration, and manufacturing across the entire 3D IC value chain.
Siemens EDA is leading this shift by enabling such an ecosystem through structured workflows, collaborative standards, interoperable tools and a new class of design enablement kits.
The Shift to System Technology Co-Optimization
To meet modern design requirements, the industry is embracing a system-level methodology known as System Technology Co-Optimization (STCO). Rather than designing a single monolithic SoC, STCO breaks down functionality into modular chiplets, each optimized for specific tasks and potentially manufactured using different process nodes or by different vendors. These chiplets are then integrated into a unified 3D IC package. This approach offers several advantages. Designers can achieve higher performance by using specialized chiplets for different functions, improve yields by isolating defects to individual modules, and reduce costs by combining mature and leading-edge technologies in a single package.
However, these benefits come with significant challenges. Coordinating the design, integration, and testing of multiple chiplets within a complex 3D package requires new tools, workflows, and standards that go beyond traditional IC design.
Enabling Design with 3D IC Design Kits
Recognizing the above mentioned challenges, Siemens EDA has introduced a comprehensive framework of 3D IC Design Kits (3DKs) to support every phase of the design process. These kits were developed in collaboration with the Chiplet Design Exchange (CDX), a working group within the Open Compute Project that includes EDA vendors, foundries, OSATs, and system designers.
The first of these kits, the Chiplet Design Kit (CDK), provides standardized models for defining the electrical and physical characteristics of a chiplet. Built on the JEDEC JEP30 part model and enhanced with the CDXML schema, CDKs make chiplet attributes machine-readable and easily integrable into design workflows. The Package Assembly Design Kit (ADK) defines the mechanical and electrical rules for assembling chiplets, interposers, and substrates into a complete 3D stack. This includes specifications for spacing, pitch, and orientation, and may soon incorporate IEEE’s 3Dblox standard for describing 3D structures.
The Material Design Kit (MDK) addresses a previously unmet need: standardizing the material properties of components for use in thermal, stress, and electrical analyses. Instead of relying on manually input data from vendors, MDKs make this information readily available in formats that can be directly imported into EDA and MCAD analysis tools. Finally, the Package Test Design Kit (TDK) defines how embedded chiplets are tested at various stages, from wafer sort to final system-level validation. These kits include physical test pin locations, test modes, and interface specifications essential for planning and executing test strategies.
Building a Connected Chiplet Marketplace
Beyond enabling the technical workflows, Siemens EDA envisions a broader transformation of the supply chain through a standardized chiplet marketplace. CDKs, encoded in the JEDEC part model format, can serve as entries in an electronic catalog of chiplets. This allows system designers to discover, evaluate, and select components based on standardized attributes. In the future, this marketplace could also support inventory management, procurement, and real-time supply chain visibility, thereby streamlining business transactions between chiplet suppliers and customers. This open marketplace model has the potential to democratize 3D IC design by lowering the barriers for entry and fostering innovation beyond the realm of Tier 1 hyperscalers.
Authoring Tools and Open Access Initiatives
To support the widespread adoption of 3DKs, Siemens EDA is also investing in the development of authoring tools that simplify the creation and use of machine-readable models. While many of the underlying formats are based on XML for compatibility with automated tools, XML is not user-friendly for manual editing. Siemens EDA proposes the creation of open, EDA-neutral authoring tools for ADKs and MDKs that would ensure consistency across different workflows and enable a diverse set of vendors to contribute to the ecosystem.
These tools would allow design and manufacturing stakeholders to align on a shared set of rules and material properties, ultimately enabling a more efficient and collaborative supply chain. By enabling consistent and reproducible design parameters, these tools can help generate EDA-specific PDKs that are tailored for individual design environments while maintaining a common data backbone.
Toward an Open and Scalable 3D IC Ecosystem
To date, early adoption of 3D IC technologies has been concentrated among large cloud providers and HPC-focused companies. These organizations have largely operated within closed ecosystems, building custom chiplets for high-performance compute and AI processors. While effective for their specific needs, these proprietary environments limit broader participation and reuse.
Siemens EDA is working to expand the reach of 3D IC technology by promoting open standards, reusable chiplet components, and accessible design tools. The adoption of 3DKs by foundries, OSATs, material providers, EDA vendors, and system integrators is an essential step toward realizing a scalable, heterogeneous 3D IC design ecosystem. This vision supports not only high-end computing but also emerging applications in consumer electronics, automotive systems, IoT devices, and beyond.
Summary
Heterogeneous 3D IC design represents a profound shift in how semiconductor systems are conceived, developed, and manufactured. Siemens EDA is playing a pivotal role in enabling this transition by offering a comprehensive suite of tools, standards, and workflows that make 3D ICs more accessible and scalable. Through collaborative initiatives like the CDX and the development of open, interoperable 3DKs, Siemens EDA is helping to pave the way for a future where innovative semiconductor designs, addressing not only HPC but other emerging applications too, can thrive across a truly global and inclusive ecosystem.
This topic is discussed in detail in a whitepaper from Siemens EDA and can be downloaded from here.
Share this post via:
Comments
There are no comments yet.
You must register or log in to view/post comments.