At Embedded World 2025 in Nuremberg, Germany, on March 11, 2025, Yuning Liang, DeepComputing Founder and CEO walked onto the stage with a mischievous smile and a challenge. “What’s the hardest product to make?” he asked rhetorically. “A laptop. It’s bloody hard… but we did it. You can swap the motherboard, you can upgrade, you can’t make excuses anymore. Use it, break it, fix it,” he exclaimed.

Looking back, it seems serendipity guided Liang’s path. He left China in the ’90s for England’s Midlands, where he studied electronics at university. A professor’s recommendation sent him to Singapore’s Nanyang Technological University on scholarship, launching his journey into computer engineering and AI research. He paused his PhD studies to join Xerox’s Asia-Pacific expansion. Five years there exposed him to proprietary systems and then to open platforms. At Nokia, he led feature phone platforms, watching the company’s fortunes collapse under Android’s rise. He then spent four years at Samsung driving open enterprise software. Huawei recruited him to optimize Android runtimes—an experience that inspired him to launch a security platform startup with several million in VC funding in 2018.

Liang never intended to be a hardware entrepreneur. “I’m a software guy. I was stupid enough to waste all my money on hardware,” he exclaimed during his Open-Source Summit Europe (OSS) presentation in Amsterdam, Wednesday August 27, 2025. His résumé backs him up: Xerox, Nokia, Samsung — all in software, from Java virtual machines (JVM) to mobile platforms. He honed his expertise putting JVMs onto PowerPC and ARM, he recalled at OSS Europe 2025. I was in charge of the Java platform for Nokia on the feature phones. We had ARM7, ARM9— not even Cortex at the time,” he intoned during his talk.

Then came the worldwide COVID lockdowns. During this time in China, RISC-V emerged as a strategic workaround for a nation seeking technological autonomy. This meant accelerating investment in homegrown RISC-V cores, toolchains, and ecosystems. The result was transformative. The architecture moved from a research curiosity into a national asset. The lockdown didn’t just expose vulnerabilities—it galvanized a shift toward open silicon, with RISC-V positioned as both a technical enabler and a geopolitical hedge. The IBM PC in the 1990s propelled The U.S. GDP growth to double for the decade. Could open-source computing based on RISC-V do the same today? That is Liang’s gamble.

After selling his previous startup and stuck at home, Liang shifted his focus to RISC-V hardware and looked for something else to do. Out of boredom and frustration, DeepComputing was born. At first it was small projects: an RC car, a drone, some smart speakers — all running on RISC-V. “I had nothing better to do but electronics,” he admitted. But those toys were a training ground. They taught him the limits of early SoCs and showed him just how much work it would take to push RISC-V toward mainstream use. As the world turned inward, so too Liang—redirecting his career toward the open hardware movement RISC-V now symbolized.

From the beginning, Liang leaned on pioneers like SiFive and Andes Technology. Their CPU cores — SiFive’s U74 (RV64GC_Zba, Zbb)—Zba Address Generation, Zbb Basic bit manipulation—and Andes’s 7nm QiLai family — gave DeepComputing the building blocks for something more ambitious than toys. “None of our SoC manufacturers knew where to go,” he quipped at Embedded World 2025. “They didn’t know what nanometer, what compute power, how many TOPS, how much DDR.”  His message to the audience: don’t wait for perfect specs — ship something.

Where others saw uncertainty, Liang saw opportunity. He wasn’t going to out-engineer Intel or ARM. But he could take existing IP and push it into places no one else dared — consumer laptops, where expectations were unforgiving and excuses ran out fast. Liang chuckled as he recalled the first RISC-V laptop, Roma: “I made 200 of them. Two hundred crazy guys paid me — $5,000 each. But I still lost money,” he declared at FOSDEM (Free and Open-Source Developers’ European Meeting) 2025—one of the world’s largest gatherings of open-source enthusiasts, developers, and technologists in Brussels. Roma was no commercial success, but it was proof. People wanted to touch RISC-V, not just read about it in white papers. They wanted to hold it, break it, fix it — exactly what Liang had promised. And it gave him credibility: he was no longer just another RISC-V enthusiast waving slides. He had hardware in the wild, and that mattered.

The Twitter Pitch

The real breakthrough came not at a conference, but on Twitter. Liang reached out cold to Framework. Nirav Patel founded San Francisco-based Framework Computer Inc., in 2020 to redefine the laptop industry by building computers users can upgrade, fix, and customize—empowering ownership rather than planned obsolescence. Its flagship product, the Framework Laptop 13, earned acclaim for its open ecosystem and DIY-friendly design, while the newer Laptop 16 expanded into high-performance territory with swappable input modules and GPU upgrades. Framework isn’t just selling laptops—it’s selling a movement. It was exactly the partner Liang needed to distribute his RISC-V laptop.

“I pinged them on Twitter. I begged them — you do the shell; I’ll do the motherboard. Why not? We are open,” he exclaimed on the FOSDEM 2025 stage. It was audacious — a scrappy RISC-V builder pitching a darling of the repair-friendly laptop scene. But it worked. Framework agreed. DeepComputing would focus on motherboards; Framework would provide the shells, distribution, and community. At RISC-V Taipei Day 2025, Liang turned this into a rallying cry: “Don’t throw away the case. Throw away the motherboard. You can throw x86 away, you can throw ARM away, change it to RISC-V. How good is that? No more excuses.

Liang described his method as a ‘Lego’ approach: modular, imperfect, iterative. “I don’t care how crap the hardware is,” he decried. “Make it into a product, open it up, give it to the open-source community. Twenty million developers will help you optimize it,” Liang exhorted at Embedded World 2025. By treating laptops like Lego kits — cases here, chiplets there, swappable boards everywhere — he created a system where failure wasn’t fatal. If a design fell short, you didn’t scrap the whole thing. You just swapped in another board.

AI the Killer App

Just as the Homebrew Computer Club gave early PC hobbyists a place to swap ideas in the 1970s, new online communities are coalescing around local AI. Reddit forums like r/LocalLLaMA and r/ollama, Discord servers for llama.cpp and Ollama, and Hugging Face discussion threads have become the meeting halls where enthusiasts trade benchmarks, quantization tricks, and new use cases. These are incubators of a culture that treats local AI inference the way early hobbyists treated microcomputers: as a frontier to be explored, shared, and expanded together.

Liang sees the same cultural energy, but knows that without upstreaming, RISC-V risks falling out of sync with every new kernel release. DeepComputing, he realized, couldn’t remain a boutique shop forever. “Once we hit 10,000 units, we break even,” he declared at OSS Europe 2025. That became his new target: scale beyond early adopters, reach students, reach universities. He launched a sponsorship program—free IP, free SoCs, free boards—for schools willing to teach RISC-V. “Help me move bricks,” he implored. “Otherwise, we’re all dead.”

Scaling the Software Cliff

By 2025, DeepComputing was rolling out boards with four, eight, even 32 cores—some targeting up to 50 TOPS of AI acceleration. Hardware was moving fast. But at OSS Europe 2025, Liang admitted the real bottleneck wasn’t silicon. “It’s not a hardware issue. It’s a software issue. Even Chromium doesn’t have a RISC-V build on their Continuous Integration (CI). Without upstream, who’s going to maintain it?” he asked.

Chromium became his case in point. Beneath its familiar interface lies a labyrinth of dependencies: hundreds of handwritten assembly libraries tuned for x86 and ARM, and a build system that challenges even seasoned developers. For most users, this complexity is invisible. But for anyone bringing up a new instruction set like RISC-V, Chromium is a gatekeeper. Without native support, a RISC-V laptop can’t run a modern browser—no tabs, no JavaScript, no YouTube, no GitHub. What looks like a coding detail becomes a usability cliff.

That’s why “Chromium out of the box” isn’t a luxury—it’s a litmus test. To move beyond dev boards into mainstream PCs, RISC-V must pass through the crucible of Chromium. And that means more than just compiling the browser: it means pulling in optimized libraries, build scripts, and platform assumptions. In short: no Chromium, no desktop.

Progress has been fragile but real. Greg Kroah-Hartman, the Linux maintainer, once sent Liang a video with a simple lesson: always upstream early, even from FPGA prototypes. Liang took it to heart. “Otherwise, you wait nine months, and by the time you reach market, your kernel is already out of date,” he said.

The effort to bring Chromium and CI to RISC-V is no longer theoretical—it’s underway, though unfinished. Community and vendor teams, including Alibaba’s Xuantie group, now have Chromium builds running on RISC-V hardware, with active work to optimize the V8 engine and UI responsiveness. Developers can already cross-compile, and repositories host functional ports. But upstream integration is still marked “In Progress” in Chromium’s tracker. That leaves RISC-V vulnerable to regressions, and performance still lags behind x86 and ARM—with slow rendering and video stutter.

This is where RISE, the industry-backed non-profit, comes in. Supported by Google, Intel, NVIDIA, Qualcomm, and others, RISE’s mandate is to make sure RISC-V isn’t treated as an afterthought in critical software stacks. By funding CI integration and pushing upstream support for projects like Chromium, Linux, and LLVM, RISE is trying to turn Liang’s fragile progress into something permanent. The vision is simple: once RISC-V is tested every day in the same CI loops as x86 and ARM, it stops being a science project and starts being “just another architecture” — ready for real desktops.

Through it all, Framework has been the constant—the partner that turned Liang’s persistence into something more than a COVID-era project. “We’ve been open, we’ve been slow, but we keep going. Hope lets us work harder,” Liang said. For the RISC-V movement that has spent fifteen years chasing its breakthrough, he offers something rare: momentum.

Also Read:

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Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs

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