Synopsys Low Power Workshop Offers Breadth and Depth

Synopsys Low Power Workshop Offers Breadth and Depth
by Bernard Murphy on 06-18-2019 at 5:00 am

Synopsys seems to particularly excel at these events, whether in half-day tutorials at conferences or, as in this case, in a full-day on-site workshop. You might think there’s not much that can be added in this domain, other than to bring low-power newbies up to speed, but you’d be wrong. This event set the stage with surveys on needs… Read More


Synopsys Tackles Debug for Giga-Runs on Giga-Designs

Synopsys Tackles Debug for Giga-Runs on Giga-Designs
by Bernard Murphy on 03-12-2019 at 12:00 pm

I think Synopsys would agree that they were not an early entrant to the emulation game, but once they really got moving, they’ve been working hard to catch up and even overtake in some areas. A recent webinar highlighted work they have been doing to overcome a common challenge in this area. Being able to boot a billion-gate design, … Read More


Accelerated Verification with Synopsys

Accelerated Verification with Synopsys
by Alex Tan on 07-17-2018 at 12:00 pm

Image RemovedAt DAC 2018, Synopsys held a lunch panel discussing verification challenges faced by the industry leaders, their adopted approaches and the overall verification technology trends. This panel of industry experts from Intel, AMD, Samsung, STM and Qualcomm also shared their viewpoints on what drives the SoC complexity… Read More


Qualcomm, AMD on Verification with Synopsys

Qualcomm, AMD on Verification with Synopsys
by Bernard Murphy on 03-22-2018 at 7:00 am

Synopsys hosts a regular lunch at DVCon each year (at least over the last few years I have checked), a nice meal and a show, opening a marketing update followed by 2-3 customer presentations on how they use Synopsys verification in their flows. This year’s event was moderated by Piyush Sancheti from Synopsys Verification marketing… Read More


Synopsys Opens up on Emulation

Synopsys Opens up on Emulation
by Bernard Murphy on 07-31-2017 at 7:00 am

Synopsys hosted a lunch panel on Tuesday of DAC this year, in which verification leaders from Intel, Qualcomm, Wave Computing, NXP and AMD talked about how they are using Synopsys verification technologies. Panelists covered multiple domains but the big takeaway for me was their full-throated endorsement of the ZeBu emulation… Read More


Michael Sanie Plays the Synopsys Verification Variations

Michael Sanie Plays the Synopsys Verification Variations
by Paul McLellan on 08-31-2015 at 7:00 am

Image RemovedI met Michael Sanie last week. He is in charge of verification marketing at Synopsys. I know him well since he worked for me at both VLSI Technology and Cadence. In fact his first job out of college was to take over support of VLSIextract (our circuit extractor), which I had written. But we are getting ahead.

Michael was… Read More


John Koeter: How To Be #1 in Interface IP

John Koeter: How To Be #1 in Interface IP
by Paul McLellan on 08-03-2015 at 7:00 am

Image RemovedJohn Koeter is in charge of marketing Synopsys’ IP and prototyping solutions. I talked to him last week.

He grew up in upstate New York, son of a Scottish mother and a Dutch father who immigrated to the US, so he is first generation American, unlike everyone else I’ve interviewed so far for this series who… Read More


Synopsys Verification Continuum

Synopsys Verification Continuum
by Paul McLellan on 09-26-2014 at 4:00 pm

Image RemovedVerification spans a number of different technologies, from virtual platforms, RTL simulation, formal techniques, emulation and FPGA prototyping. Going back a few years, most of these technologies came from separate companies and one effect of this was that moving the design from one verification environment… Read More


Transaction-based Emulation

Transaction-based Emulation
by Paul McLellan on 08-14-2014 at 7:01 am

Image RemovedVerification has been going through a lot of changes in the last couple of years. Three technologies that used to be largely contained in their own silos have come together: simulation, emulation and virtual-platforms.

Until recently, the workhorse verification tool was simulation. Emulation had its place but… Read More


Hybrid Emulation

Hybrid Emulation
by Paul McLellan on 07-25-2014 at 9:01 am

Hybrid emulation is when part of the system is run in the emulator and part of the system is run in a virtual prototype. Typically a model of the processor(s) is run in the virtual platform and then the rest of the design is modeled by running the RTL on the emulator. I talked to Tom Borgstrom at Synopsys about what technology they have … Read More