Webinar: Wireless Coexistence Testing for Medical Devices

Webinar: Wireless Coexistence Testing for Medical Devices
by Admin on 11-03-2025 at 1:48 pm

Wireless connectivity is the backbone of modern medical technology, but it is also one of its greatest vulnerabilities. In connected hospitals and operating rooms, dozens of devices share a limited spectrum. Even minor interference can disrupt data, delay critical responses, and threaten patient safety.

Regulators now require

Read More

Webinar: How PCIe Multistream Architecture is enabling AI Connectivity at 64 GT/s and 128 GT/s

Webinar: How PCIe Multistream Architecture is enabling AI Connectivity at 64 GT/s and 128 GT/s
by Admin on 11-03-2025 at 12:33 pm

Featured Speakers:

  • Diwakar Kumaraswamy, Sr. Staff Technical Product Manager, Synopsys

AI and HPC workloads push fabric speeds to deliver higher parallelism and utilization at extreme data rates. To support these higher rates, the controller architecture needs to be completely redefined resulting in the new PCIe controller

Read More

Webinar: Simplify 1.6T Ethernet Testing: A New Way to Validate Interconnects

Webinar: Simplify 1.6T Ethernet Testing: A New Way to Validate Interconnects
by Admin on 10-30-2025 at 9:35 am

As 1.6T Ethernet moves from concept to deployment, validating interconnects is more critical — and complex — than ever. But the challenge demands more than just speed — it’s proving performance in real-world conditions. Traditional test methods are slow and require manual intervention — adding complexity, longer development

Read More

Webinar: Sensing the 6G Future: Insight from the Wireless Channel

Webinar: Sensing the 6G Future: Insight from the Wireless Channel
by Admin on 10-30-2025 at 9:33 am

6G is transforming wireless networks from a channel for communication into a powerful tool for sensing the world around us. Beyond connecting people and devices, 6G opens the door to applications such as gesture recognition, object detection, and location awareness — capabilities that demand new approaches to modeling, simulation,

Read More

Webinar: Advancing NTN: Challenges and Opportunities in 6G

Webinar: Advancing NTN: Challenges and Opportunities in 6G
by Admin on 10-30-2025 at 9:31 am

NTNs extend coverage everywhere; 6G delivers the tools to optimize, scale, and seamlessly integrate them.

Join our expert roundtable for a high-impact discussion on today’s NTN landscape. Discover how 6G will accelerate their evolution. Learn about the engineering challenges and opportunities shaping the future. You’ll

Read More

Webinar: AI/ML Algorithm Design and Testing Toward 6G

Webinar: AI/ML Algorithm Design and Testing Toward 6G
by Admin on 10-30-2025 at 9:18 am

AI and machine learning (AI/ML) are reshaping wireless communications, promising faster, more efficient, and more intelligent networks. But bringing these algorithms into real-world environments isn’t simple — validation and testing remain major hurdles.

In this webinar, industry expert Abhinav Mahadevan shares how

Read More

Webinar: Insights on Spectrum for 6G

Webinar: Insights on Spectrum for 6G
by Admin on 10-30-2025 at 9:15 am

About this event

Join Roger Nichols, 6G Program Manager, for an insightful discussion on the 6G spectrum. He will cover the current status of 6G technologies, standards, and policies for the next generation of wireless, including developments from 2024 after the World Radio Conference.

Who should attend this event?

This webinar

Read More

Webinar: Don’t Let VHDL Debugging Slow You Down! Use Questa One Sim

Webinar: Don’t Let VHDL Debugging Slow You Down! Use Questa One Sim
by Admin on 10-29-2025 at 7:18 am

Join us for this essential webinar where we’ll explore how  Questa One Sim empowers VHDL designers to dramatically enhance their debugging productivity. We’ll move beyond basic simulation viewing and dive into advanced features designed to pinpoint issues faster, understand design behavior more intuitively,

Read More

Webinar: HLV – Formal Verification of Synthesizable C++/SystemC Designs

Webinar: HLV – Formal Verification of Synthesizable C++/SystemC Designs
by Admin on 10-29-2025 at 7:15 am

High-Level Synthesis (HLS) is design flow in which design intent is described at a higher level of abstraction such as SystemC/C++/Matlab/etc. HLS tools are expected to synthesize this code to RTL which can be input to the traditional RTL downstream flow (RTL/GDS).

Formal check tools are difficult to be analyzed on generated

Read More

Webinar: Advanced Packaging and Material Characterization for Microelectronics: SEMI Training

Webinar: Advanced Packaging and Material Characterization for Microelectronics: SEMI Training
by Admin on 10-22-2025 at 4:04 am

Strengthen your knowledge and skills by learning about new packaging technologies in Fan-in, Fan-out WLP, Embedded packaging technology, System on Chip (SOC), System in Package (SiP), 3D IC, WLP, TSV, etc. Packaging knowledge is a must for professionals in the semiconductor industry. The first part of this course dives deep

Read More