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Intro
The Compact-Q DEER Spectrometer is designed to support researchers in academia and industry to efficiently characterize quantum materials, develop devices for quantum sensing, advance and validate algorithms to control qubits, and other applications in spin-based quantum technologies. The Compact-Q DEER system
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About this event
Be the first to see brand new, Keysight-commissioned research on Cybersecurity Maturity Model Certification (CMMC) readiness across the U.S. Defense Industrial Base. In this live webinar, we’ll unveil findings from hundreds of security, IT, and compliance leaders and show where organizations really
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Overview:
This webinar provides engineers with a science-driven framework for power supply design, rooted in the physics of electromagnetic energy flow. Inspired by Ralph Morrison’s pioneering approach, the session begins with core principles of energy behavior, then explores how current, fields, and waves interact inside
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We are pleased to offer two webinar sessions for your convenience. Please choose the time that best fits your schedule:
10:00AM – 12:00PM CET (session #1 for EMEA/APAC)
10:00AM – 12:00PM PST (session #2 for NA)
Featured Speakers:
- Kopal Kulshreshtha, Principal Product Specialist, Synopsys
- Rob Dohanyos, Principal Product
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Date: Jan 14, 2026 | 10:00 AM PST
Featured Speakers:
- Srikanth Venkat Raman, Product Management Director, Synopsys
- Khader Abdel-Hafez, Scientist, Synopsys
- Theo Toulas, R&D Principal Engineer, Synopsys
- Bruce Xue, Staff Engineer, Synopsys
As System-on-Chip (SoC) designs become increasingly complex, meeting test quality
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Timing closure is one of the most challenging aspects of ASIC design. While traditionally seen as a backend process, its resolution begins at the architectural level and extends through the implementation stages. This webinar examines the key obstacles designers encounter and demonstrates how our timing closure solutions
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As the quantum threat moves from theory to reality, attacks put all long-lifecycle designs at risk. In this early PQC era, simply implementing the new NIST algorithms isn’t enough. Implementations will evolve, and new physical attacks like side-channel analysis present a major threat to the security of these complex
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In this webinar, we will explore the growing threat that AI-fueled cyberattacks pose to chip designs and how to add expert-level security verification to your design flow to minimize those risks.
We will expose some of the details of the existential risk for electronic systems with real examples. We will then describe technology… Read More
December 17, 2025 | 10:00 AM PST
Join us to discover how Keysight Design Data Management (SOS) Enterprise Collaboration, as the backbone for modern engineering enterprises, enables teams to build organizational knowledge, secure collaboration, and prepare their data for AI and agentic workflows that drive measurable
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