Webinar: Formal Verification for Non-Specialists

Webinar: Formal Verification for Non-Specialists
by Admin on 07-06-2026 at 7:11 pm

Webinar Overview:

Is formal verification ready for general use or do you need a PhD to use it? Larger companies continue to recruit formal PhDs into their verification teams while other less-well-qualified engineers seem reluctant to go beyond simplified formal “apps”.

So, what is the truth of the matter? Can non-specialistRead More


Webinar: When Compute Outruns Data: Rethinking AI Connectivity

Webinar: When Compute Outruns Data: Rethinking AI Connectivity
by Admin on 07-02-2026 at 12:49 pm

Featured Speaker:

  • Manmeet Walia, Executive Director of Product Management, Synopsys

AI performance is no longer limited by compute—it’s limited by how efficiently data moves. As systems scale to compute-dense clusters, memory, die-to-die, and high-speed interfaces are emerging as critical bottlenecks.

This webinar explores… Read More


Webinar: Scaling Compute Connectivity with PCIe and CXL: Chip-to-Chip and Emerging Architectures

Webinar: Scaling Compute Connectivity with PCIe and CXL: Chip-to-Chip and Emerging Architectures
by Admin on 06-29-2026 at 9:28 pm

Featured Speakers:

  • Richard Solomon, Senior Staff Technical Product Manager, Synopsys
  • Ron Lowman, Staff Product Manager, Synopsys

Heterogeneous compute platforms are driving new requirements for connectivity across increasingly complex system architectures. This webinar explores how PCIe and CXL can be used to provide… Read More


Webinar: How to burst your workload to Google Cloud, without leaving your data stranded

Webinar: How to burst your workload to Google Cloud, without leaving your data stranded
by Admin on 06-29-2026 at 9:25 pm

Google Cloud offers powerful compute, networking and GPU/TPUs to run your workloads. But how to feed the beast? EDA workloads require a lot of data and scalable storage plays is that data hub which keeps your workloads going. Google worked with NetApp – a premier on-premises choice for EDA shared storage – to build … Read More


Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools

Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools
by Admin on 06-29-2026 at 9:22 pm

**Please register with professional email address**

As SoC design complexity grows and design windows shrink, EDA tools must evolve beyond traditional workflows. AI is the catalyst!

This webinar explores what the next generation of EDA tools and design platforms should look like when built with AI in the middle. We’ll… Read More


Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools

Webinar: Defacto is Boosting Front-end SoC Design With AI-Powered EDA tools
by Admin on 06-26-2026 at 11:14 am

**Please register with professional email address**

As SoC design complexity grows and design windows shrink, EDA tools must evolve beyond traditional workflows. AI is the catalyst!

This webinar explores what the next generation of EDA tools and design platforms should look like when built with AI in the middle. We’ll… Read More


How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late

How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late
by Mike Gianfagna on 06-25-2026 at 10:00 am

How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too Late

Embedded systems programs often fail because critical engineering documentation drifts out of alignment over time and distance. This results in a team that is correctly following the wrong instructions. All forms of engineering documentation suffer from this problem, and it really is the silent killer of many programs.

llmda.aiRead More


Webinar: Intel: Pushing EMIB Forward Design Methodology Insights with Synopsys Tools – SemiWiki

Webinar: Intel: Pushing EMIB Forward Design Methodology Insights with Synopsys Tools – SemiWiki
by Admin on 06-02-2026 at 1:10 pm

Date: Jun 25, 2026 9:00 AM PST

In this webinar, Intel will present how EMIB (Embedded Multi‑die Interconnect Bridge) enables compact, cost-effective multi‑die design while sustaining the bandwidth and power efficiency required for AI and datacenter designs. Intel will share an EMIB reference methodology built on Synopsys

Read More