Webinar: Using Veloce PCD to implement an Arm CSS with confidence

Webinar: Using Veloce PCD to implement an Arm CSS with confidence
by Admin on 04-22-2025 at 10:09 am

Software Defines Everything
For today’s SoC and system designs, hardware is designed and optimized for the software workload. Workloads can include firmware, multi-OS architectures, AI/ML and complex graphics. These combined produce large software models that put pressure on system-level verification.

What is the Arm

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Webinar: Boost Verification Efficiency with VC Execution Manager: Harnessing AI/ML for Superior Regression Management

Webinar: Boost Verification Efficiency with VC Execution Manager: Harnessing AI/ML for Superior Regression Management
by Admin on 04-18-2025 at 9:48 am

Featured Speakers:

  • Gopinath Lakshmi Narasimhan, Sr. Architect Applications Engineer
  • Robert Ruiz, Sr. Director, Product Management

Why You Should Attend:

  • Discover the innovative capabilities of Synopsys VC Execution Manager for streamlined verification processes.
  • Learn about the seamless integration of advanced AI/ML
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Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library

Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library
by Admin on 04-09-2025 at 2:36 am

As hyperscaler chiplet and SoCs grow in complexity, integrating and validating multiple high-speed and low-speed interface protocols—such as PCIe, CXL, UCIe, AMBA, AXI, AHB, CHI, CSI2, and DSI2, can be a significant challenge. Design Verification Engineers and Technical Managers must ensure seamless protocol compliance

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Webinar: PCIe 7.0? Understanding Why Now is the Time to Transition

Webinar: PCIe 7.0? Understanding Why Now is the Time to Transition
by Admin on 04-07-2025 at 3:16 am

Join us for an Q&A technical session with Madhumita Sanyal, technical product director of HPC IP, and Richard Solomon, principal product manager and vice-president of PCI-SIG, discussing the pivotal role of PCIe 7.0 in enabling high-performance computing, AI clusters, and next-gen chip designs. This session will explore

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Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library

Webinar: Simplifying Interface Protocol Verification with Veloce Transactor Library
by Admin on 03-27-2025 at 1:04 pm

As hyperscaler chiplet and SoCs grow in complexity, integrating and validating multiple high-speed and low-speed interface protocols—such as PCIe, CXL, UCIe, AMBA, AXI, AHB, CHI, CSI2, and DSI2, can be a significant challenge. Design Verification Engineers and Technical Managers must ensure seamless protocol compliance

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Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction

Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction
by Daniel Nenni on 03-27-2025 at 10:00 am

RDA SemiWikiblog graphic

We have been hearing so much lately about the power of AI and the potential of technologies like agentic AI to address the productivity gap and complexities of semiconductor designs of today and tomorrow.  Currently, however, the semiconductor industry has been slow to adopt generative and agentic AI for RTL design code.   There… Read More


Webinar: Evaluating LLM Agents: Metrics, Methods, and Practical Examples

Webinar: Evaluating LLM Agents: Metrics, Methods, and Practical Examples
by Admin on 03-26-2025 at 12:27 pm

Webinar Content

Dive into the world of evaluating Large Language Model (LLM) agents with a focus on practical insights and actionable strategies. This webinar will cover key evaluation metrics and methodologies to assess the performance, reliability, and effectiveness of LLM agents in diverse applications. Gain a comprehensive

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Webinar: Advanced qualification of smart vibration sensors for optimizing IoT applications

Webinar: Advanced qualification of smart vibration sensors for optimizing IoT applications
by Admin on 03-26-2025 at 12:26 pm

Webinar content

Smart vibration sensors are used, among other things, in infrastructure monitoring in smart cities and in condition monitoring on machines and industrial plants. The sensors used are often based on microelectronic sensors (MEMS), which are tested as components in production but sometimes exhibit different

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Webinar: Implementing State-of-the-Art Digital Protection with Rambus CryptoManager Security IP

Webinar: Implementing State-of-the-Art Digital Protection with Rambus CryptoManager Security IP
by Admin on 03-26-2025 at 12:25 pm

The pace of value creation driven by AI is unprecedented, starting with model training in the data center which further enables a vast array of inference applications across different industries. Protecting this valuable data is mission critical. With the introduction of its latest generation CryptoManager Security IP, Rambus… Read More