TSMC as Pure Play Wafer Foundry
TSMC started its wafer foundry business more than 30 years ago. Visionary management and creative engineering teams developed leading-edge process technologies and their reputation as trusted source for high-volume production. TSMC also recognized very early the importance of building an … Read More
Regular Semiwiki readers are aware of the rapid emergence of various (multi-die) advanced package technologies, such as: FOWLP (e.g., Amkor’s SWIFT, TSMC’s InFO); 2D die placement on a rigid substrate (e.g., TSMC’s CoWoS); and, 2.5D “stacked die” with vertical vias (e.g., any of the High Bandwidth Memory,… Read More
I caught up with John Ferguson of Mentor Graphics this week to learn more about a recent announcement that TSMC has extended its collaboration with Mentor in the area of Fan-Out Wafer Level Processing (FOWLP).
In March of last year Mentor and TSMC announced that they were collaborating on a design and verification flow for TSMC’s… Read More
It is that time again, time for the originators of the pure-play foundry business to update their top customers and partners on the latest process technology developments and schedules. More specifically, all of the TSMC FinFET processes (16nm, 10nm, 7nm, and beyond), TSMC IP portfolio (CMOS image sensor, Embedded Flash, Power… Read More
Recent reports have Intel displacing Qualcomm as the modem supplier and TSMC as the foundry for the next Apple A10 SoC. That is if you call this a credible report: … Read More
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Synopsys talks about their DesignWare USB4 PHY at TSMC’s OIP