Cadence’s Signoff Summit will be held next week, November 21 at Cadence in San Jose.
This is the first of a series of all-day Signoff Summits from Cadence that focus on the multiple facets of design signoff. This first summit will include keynote addresses plus sessions covering the multiple solution components that comprise… Read More
DAC: Tempus Lunchby Paul McLellan on 06-06-2013 at 4:03 pmCategories: Cadence, EDA
I had time for lunch on Monday. That is to say, there was a Cadence panel session about Has Timing Signoff Innovation has become and Oxymoron? What Happened and How Do We Fix It?
The moderator was Brian Fuller, lately of EE Times but now Editor-in-Chief at Cadence (I’m not sure quite what it means either). On the panel were Dipesh… Read More
Today Cadence announced Tempus, their new timing signoff solution. This has been in development for at least a couple of years and has been built from the ground up to be massively parallelized. Not just that different corners can be run in parallel (which is basically straightforward) but that large designs can be partitioned … Read More