Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension

Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension
by Daniel Nenni on 01-20-2026 at 6:00 am

Pushing the Packed SIMD Extension Over the Line Andes RISCV Summit

The rapid growth of signal processing workloads in embedded, mobile, and edge computing systems has intensified the need for efficient, low-latency computation. Rich Fuhler’s update on the RISC-V Packed SIMD extension highlights why scalar SIMD digital signal processing (DSP) instructions are becoming a critical architectural… Read More


New ARC VPX DSP IP provides parallel processing punch

New ARC VPX DSP IP provides parallel processing punch
by Tom Simon on 10-29-2019 at 6:00 am

The transition to the digital age from a mostly analog world really began with the invention of the A-to-D and D-to-A converters. However scalar processors can easily be overwhelmed by the copious data produced by something as simple as an audio stream. To solve this problem and to really jumpstart the digital age, the development… Read More


Gustafson on Parallel Algorithms

Gustafson on Parallel Algorithms
by Paul McLellan on 11-05-2012 at 4:54 pm

At the keynote for ICCAD this morning, John Gustafson of AMD (where he is Chief Graphics Product Architect as well as a Fellow) talked about parallel algorithms. Like Gene Amdahl, whose law states that parallel algorithms are limited by the part that cannot be parallelized (if 10% is serial, then even if the other part takes place… Read More


Smart mobile SoCs: NVIDIA

Smart mobile SoCs: NVIDIA
by Don Dingee on 05-02-2012 at 4:16 pm

When the name synonymous with personal computer graphics decided to turn their engineering talent toward the mobile business, heads turned. NVIDIA has rather quickly gained a foothold in tablets by squeezing four high performance processing cores, twelve graphics cores, and more onto a Tegra 3.… Read More