Today, we find ourselves at the nexus of the fourth industrial revolution — an era dominated by Smart Everything. The internet, artificial intelligence, and the use of software are helping to create things that couldn’t even be imagined just a decade or two ago. The opportunities seem limitless, and the potential for more world-changing… Read More
ASIP Designer enables the creation of custom vector DSPs for AI
Wednesday, May 22, 2024
4:00 – 6:00 pm CEST / 7:00 – 9:00 am PT
The revolution in AI triggers an increased awareness for application-specific instruction-set processors
As AI is redefining communication and connectivity, your ability to design, simulate, and test — using an intelligent and automated workflow — is what will set you apart.
Join us for a half-day event that brings together top industry experts and innovators to explore modern RF circuit and system design, including advanced topics… Read More
The evolving landscapes of satellite communications, wireless, and millimeter-wave communications are drivers for innovative technology developments leading to the demand for more bandwidth.
This complimentary event includes dynamic discussions, live product demonstrations, and presentations on the latest applications.… Read More
Are you looking to increase your RF IQ? Join our technical experts as they share the latest advances for characterizing complex devices. Seating is limited, so make sure to reserve your spot today!
This complimentary full-day event includes dynamic discussions, live product demonstrations, and presentations on the latest … Read More
Join Keysight for a comprehensive overview of the latest developments in wireless communications testing from 5G deployments to 6G research. Local Keysight experts will be in attendance to demonstrate the latest in Keysight’s 5G and RF solutions.
What: Better IP Test with IJTAG
When: 26 March, 2013, 10:30am-1:30pm
Where: Mentor Graphics, 46871 Bayside Parkway, Fremont, CA 94538
If you are involved in IC test*, you’ve probably heard about the IEEE P1687 standard, called IJTAG for ‘internal’ JTAG. IJTAG defines a standard for embedded IP that includes simple… Read More
Last week I attended the Ansys/Apache seminars on “Dimensions of Electronic Design.” The two big challenges as we go down to 28nm and 20nm and below are keeping power manageable and keeping reliability up.
The big challenge with power is that we can put so much stuff on a die and clock it so fast that the power is exceeding… Read More
If you are involved in testing memory or logic of ARM-based designs, you’ll want to attend this free seminar on July 17, 2012 in Santa Clara. Mentor Graphics and ARM have a long standing partnership, and have optimized the Mentor test products (a.k.a Tessent) for the ARM processors and memory IP.
The lunch seminar runs from 10:30-1:00… Read More
Jasper has three seminars coming up in May in Hsinchu (Taiwan), Beijing and Shanghai. These are full-day seminars on how to solve critical verification challenges using state-of-the-art formal technology. Breakfast and lunch will be served.
This full-day tutorial will be given by technical experts for verification experts… Read More
