For those of you who don’t know, GitHub is the crowdsourcing version of the defacto industry standard GIT source code management software. Currently, more than 14 million people have deposited more than 35 million software projects (mostly open-source) on GitHub making it the largest host of source code in the world.
Now think… Read More
Continuing to find new ways to extend Moore’s Law, the foundry and technology leader is ready to show off its wafer level system integration prowess with two scalable platforms targeting key growth markets.
CoWoS® (Chip-On-Wafer-On-Substrate) goes after high-performance applications, providing the highest bandwidth and… Read More
Working at Intel as a circuit designer I clearly remember how there were three distinct groups: Process Development, CAD and Circuit Design. Each of the groups sat in a different part of the building in Aloha Oregon, we had different job titles, different degrees, spoke with different acronyms and yet we all had to work together … Read More
Evolving opportunities call for new and improved solutions to handle data, bandwidth and power. Moving forward, what will be the high-growth applications that drive product and technology innovation? The CAGRs for smartphone and data center continue to be very strong and healthy. … Read More
A new term has entered the vernacular of electronic design engineering — pathfinding. The complexity of the functionality to be integrated and the myriad of chip, package, and board technologies available make the implementation decision a daunting task. Pathfinding refers to the method by which the design space of technology… Read More
For the last several years, people have predicted the end of Moore’s Law. The reasoning is that there is a limit at which one can’t shrink transistors any further. A reoccurring comment has been “You can’t divide an atom.” I had assumed that its demise would be at the hands of a new paradigm like quantum computing. Now, with Intel’s … Read More
The International Electron Devices Meeting (IEDM) is one of, if not the premier conference for semiconductor process technology. The 2015 meeting just finished up on Wednesday, December 9th.
This year’s meeting was held from Saturday, December 5[SUP]th[/SUP] through Wednesday, December 9[SUP]th[/SUP] in Washington DC.… Read More
As stated in my previous article, about the complexity of the SOC with billions of transistors. It is essential to consider the real practical scenario for the two dimensional verses three dimensional structure of the chip. Although the new technological changes and evolution for the shrinking process node can create ease for… Read More
If expanding industries typically indicate vibrancy, a race to acquire and consolidate is generally reflective of the opposite – a period of slowed growth in mature, once high-flying categories. And while many industries experience a period of stardom, followed by a sharp and steady decline, we should be extremely worried when… Read More
I have previously written about SPIE day 1 and 2 so I want to wrap up my coverage with some impressions from days 3 and 4. My single biggest take away from the conference is that EUV has made tremendous progress in the last 12 months. Last year the mood of the conference was in my opinion pessimistic with respect to EUV, this year the mood… Read More