For years, there have been rather distinct domains for the extraction of interconnect models from physical design data.
Chip designers commonly focused on RC parasitics for circuit/path delay calculations and dynamic I*R voltage drop analysis. The annotation of extracted parasitics to a netlist model required the layout… Read More
Electromagnetic (EM) simulations have been performed on die metal structures since the 1990s. Originally, the analysis was restricted to a single device (e.g., a spiral inductor). The number of on-die devices simulated simultaneously grew with the increasing capabilities of the computers performing the computations. This… Read More
