I was at the Cadence front-end summit this week; good conference with lots of interesting information. I’ll start with a panel on optimizing power for wearables. Panelists were Anthony Hill from TI, Fred Jen from Qualcomm, Leah Clark from Broadcom and Jay Roy from Cadence. Panels are generally most entertaining when the panelists… Read More
Variation at IEDM
IEDM (technically the International Electron Devices Meeting although I’ve never heard anyone use the full name) is in a couple of weeks time, in San Francisco. It is December 15-17th at the Hilton Union Square (which is not actually at Union Square but nearby at 333 O’Farrell Street).
For the last few years on the Tuesday… Read More
IoT Breakfast Panel at DAC
Tuesday morning at DAC I enjoyed a free breakfast courtesy of Synopsysand GLOBALFOUNDRIESwhere I learned more about the emerging market of IoT, and what it means to semiconductor, EDA and IP vendors. Panelists included: Semico Research, HP, Synopsys, GLOBALFOUNDRIES and Broadcom. … Read More
TSMC: Keynote, OIP, 20nm, 16nm, panels, and more #51DAC
What is TSMC doing at DAC?
The biggest event is presumably Cliff Hou’s DAC keynote on Monday at 3.25pm Industry Opportunities in the Sub-10nm Era. And he also wrote the foreword to Fabless, the book that Dan Nenni and I have written and where you can get a signed copy on Tuesday evening at the reception.
There is an IP workshop … Read More
Partitioning Pavilion Panel
I don’t think it can be a surprise to anyone reading this that designs have been getting larger. Someone called Moore said something about it decades ago, or so I heard. Designs are so large that they need to be partitioned into smaller parts. The two main motivations for this are that some design tools, especially place &… Read More