Challenges of Low Power Network-on-Chip Designs

Challenges of Low Power Network-on-Chip Designs
by Randy Smith on 08-05-2013 at 8:00 pm

Everyone understands that as we increasingly focus on the design of mobile devices, there is an increasing focus on low power. But, what is implied in designing for low-power? Designing for low power means we have to work with multiple power domains and multiple clock domains—making our design task more complex. We also must get… Read More


Xilinx picks another winner…

Xilinx picks another winner…
by Luke Miller on 07-31-2013 at 7:00 pm

Just as important as block RAMs, IO and DSP48’s is what interconnect or fabric is going to be used when considering SoC FPGA designs. I think Xilinx has found the winning combination. What is paramount to the new SoC FPGA methodologies is not only the challenge of moving huge amounts of data around; we are now to consider data… Read More


The FPGA Blob is Coming…

The FPGA Blob is Coming…
by Luke Miller on 07-24-2013 at 5:00 pm

I never understood when I was a kid how ‘the Blob’ could actually catch someone but it sure did. It caught the unsuspecting, the off guard. I mean you’d have time for a soda and shower if you saw it on your road. And no, your manager is not the Blob; don’t think like that, it’s always his boss. The blob comes to consume the worker who was unaware… Read More


“NoC, NoC” – Are You Listening to nVidia’s Dally?

“NoC, NoC” – Are You Listening to nVidia’s Dally?
by Randy Smith on 07-18-2013 at 11:00 pm

Recently Bill Dally, nVidia’s Chief Scientist & SVP of Research, and a professor of electrical engineering and computer science at Stanford University, has been out speaking quite a bit including a “short keynote” at the Design Automation Conference and a keynote at ISC 2013. The DAC audience is primarily EDA tool users and… Read More


How to reduce routing congestion in large Application Processor SoC?

How to reduce routing congestion in large Application Processor SoC?
by Eric Esteve on 07-14-2013 at 10:22 am

Application Processor SoC integrates more and more functions, generation after generation, challenging performance, cost, power efficiency, reliability, and time-to-market. But the maximum die size can’t increase, at least because of the constraints linked with wafer production, manufacturability, yield and finally… Read More


Swap and Play Extended To Chip Fabric and Memory Controllers

Swap and Play Extended To Chip Fabric and Memory Controllers
by Paul McLellan on 06-16-2013 at 9:08 am

Virtual platforms enable software development to take place on a model of an electronic system. What everyone would like is models that are fast and accurate but that is simply not possible. Fast models are fast because they don’t model everything at the signal level. And accurate models get to be accurate by handling a lot of detail… Read More


Network-on-Chip is the backbone of Application Processor and LTE Modem

Network-on-Chip is the backbone of Application Processor and LTE Modem
by Eric Esteve on 05-23-2013 at 9:38 am

I have mentioned NoC adoption explosion during the last two years, illustrated by the huge revenue growth of Arteris. This trend is now confirmed in the fastest moving segments, the Application Processors (AP) and LTE Modem for mobile applications. In fact, Arteris FlexNoC has been integrated in the majority of AP and LTE Modem… Read More


Sonics-ARM Form A Potent IP Combination

Sonics-ARM Form A Potent IP Combination
by Randy Smith on 05-13-2013 at 1:30 pm

Recently, Sonics and ARM entered into an agreement whereby ARM licensed a significant portion of Sonics’ patent portfolio. Sonics, Inc. is one of the leading providers of connectivity IP often referred to as network-on-chip, or NoC. ARM is the leading provider of processor intellectual property (IP). The potential scope… Read More


(Must Read) Arteris Blog activity: IP, 20 nm node and CTO interview

(Must Read) Arteris Blog activity: IP, 20 nm node and CTO interview
by Eric Esteve on 04-30-2013 at 8:10 pm

I just read three very interesting blogs from Arteris. In the first “The Semiconductor Industry Needs an IP Switzerland”, Kurt Shuler, VP of Marketing for Arteris, enjoys about the fact that four big IP players (ARM, Synopsys, Imagination and Cadence) are emerging after years of fragmentation within the semiconductor IP industry.… Read More


After 10 years promoting crossbar switch for interconnects, Sonics finally admit that NoC is better

After 10 years promoting crossbar switch for interconnects, Sonics finally admit that NoC is better
by Eric Esteve on 10-15-2012 at 11:27 am

Network on Chip (NoC) technology is probably one of the most fascinating new concepts that has been developed and is implemented in real chips. NoC can be integrated into various System on Chip (SOC), targeting several market segment: Video Processing, Consumer Electronics, Automotive, Networking, Multimedia (digital TV),… Read More