DVClub Europe: Edinburghby Admin on 01-08-2025 at 10:14 pm
Theme: Mixed Signal Verification
Analog mixed signal chips continue to grow in both demand and complexity, and a consistent efficient verification approach remains a key topic for concern. This DVClub will be held at the Futures Institute at the University of Edinburgh and the university students will be attending. The first… Read More
I just read an interesting white paper on functional verification of analog blocks using SV-RNM (SystemVerilog real number modeling). The content is worth the effort to read closely as it elaborates a functional verification flow for RNM matching expectations for digital logic verification, from randomization to functional… Read More
Bram co-founded ICsense in 2004 as a spin-off of the University of Leuven. He is CEO since 2004 and helped growing the company from 4 to over 100 people in 20 years while being profitable every year. He managed the acquisition by TDK in 2017. He is an experienced entrepreneur in the micro-electronics field with a strong interest in … Read More
Alphacore Inc., an industry leader in proven high-performance analog and radio-frequency (RF) design building blocks, end products, and intellectual property (IP) licensing and non-recurring engineering (NRE) design services. Our customers include multi-national corporations to ground-breaking startups. We were … Read More
Keynotes commonly provide a one-sided perspective of a domain, either customer-centric or supplier-centric. Kudos therefore to Cadence’s Paul Cunningham for breaking the mold in offering the first half of his keynote to Anthony Hill, a TI fellow, to talk about outstanding challenges he sees in verification for automotive … Read More
Pulsic recently announced its new “freemium” product Animate Preview and we had the chance to chat with Mark Williams, President and CEO of Pulsic. Mark explained details of the product and the new business model that could change the direction of the traditional EDA business model structure.
What brought you to the semiconductor… Read More
The number of touchpoints between analog and digital circuits in high performance SoCs is increasing. This is not a problem because it is possible to implement critical analog blocks directly on nanometer scale digital ICs. However, in many cases digital interfaces or digital feedback circuitry configures these analog blocks… Read More
Over the years SerDes (serializer/deserializer) based connections have proliferated into just about every connection within and among computing systems. Years ago, parallel interfaces were the most common method of moving data, but issues of signal integrity, synchronization and power simply became too much for the required… Read More
In an ANSYS seminar held at DesignCon 2019, Dr. Larry Williams, ANSYS Director of Technology, outlined how 5G design innovation can be accelerated through simulation. He posited that 5G will become a general-purpose technology that affects an entire economy, drastically alter societies and unleash a cascade of complementary… Read More