An Illuminating Real Number Modeling Example in Functional Verification

An Illuminating Real Number Modeling Example in Functional Verification
by Bernard Murphy on 11-05-2024 at 6:00 am

Data stream sine waves 1s and 0s orange Getty 496123972 EXT min

I just read an interesting white paper on functional verification of analog blocks using SV-RNM (SystemVerilog real number modeling). The content is worth the effort to read closely as it elaborates a functional verification flow for RNM matching expectations for digital logic verification, from randomization to functional… Read More


CEO Interview: BRAM DE MUER of ICsense

CEO Interview: BRAM DE MUER of ICsense
by Daniel Nenni on 08-23-2024 at 6:00 am

IMG 0411[6]

Bram co-founded ICsense in 2004 as a spin-off of the University of Leuven. He is CEO since 2004 and helped growing the company from 4 to over 100 people in 20 years while being profitable every year. He managed the acquisition by TDK in 2017. He is an experienced entrepreneur in the micro-electronics field with a strong interest in … Read More


Alphacore at the 2024 Design Automation Conference

Alphacore at the 2024 Design Automation Conference
by Daniel Nenni on 06-21-2024 at 10:00 am

DAC 2024 Banner

Alphacore Inc., an industry leader in proven high-performance analog and radio-frequency (RF) design building blocks, end products, and intellectual property (IP) licensing and non-recurring engineering (NRE) design services. Our customers include multi-national corporations to ground-breaking startups. We were … Read More


Challenge and Response Automotive Keynote at DVCon

Challenge and Response Automotive Keynote at DVCon
by Bernard Murphy on 03-20-2024 at 6:00 am

dvcon 2024 keynote min

Keynotes commonly provide a one-sided perspective of a domain, either customer-centric or supplier-centric. Kudos therefore to Cadence’s Paul Cunningham for breaking the mold in offering the first half of his keynote to Anthony Hill, a TI fellow, to talk about outstanding challenges he sees in verification for automotive … Read More


CEO Interview: Mark Williams of Pulsic

CEO Interview: Mark Williams of Pulsic
by Daniel Nenni on 02-19-2021 at 6:00 am

mark williams final 2

Pulsic recently announced its new “freemium” product Animate Preview and we had the chance to chat with Mark Williams, President and CEO of Pulsic.  Mark explained details of  the product and the new business model that could change the direction of the traditional EDA business model structure.

What brought you to the semiconductorRead More


The Question That Has Guided My Analog Mixed Signal Career

The Question That Has Guided My Analog Mixed Signal Career
by Steve Logan on 01-21-2021 at 10:00 am

The Question That Has Guided My Analog Mixed Signal Career

I remember it like it was yesterday. I was sitting at lunch with good friend Scott Santandrea, explaining my struggles to get traction with the sales channel for the Analog to Digital Converter product line I was managing. My business line had been spending a lot of resources developing high-performance 24-bit delta sigma and 20-bit

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White Paper – Mixed Signal Verification for Nanometer SOCs

White Paper – Mixed Signal Verification for Nanometer SOCs
by Tom Simon on 08-19-2020 at 10:00 am

Mixed signal SOCs

The number of touchpoints between analog and digital circuits in high performance SoCs is increasing. This is not a problem because it is possible to implement critical analog blocks directly on nanometer scale digital ICs. However, in many cases digital interfaces or digital feedback circuitry configures these analog blocks… Read More


High Speed SerDes Design and Simulation Webinar Replay from Mentor

High Speed SerDes Design and Simulation Webinar Replay from Mentor
by Tom Simon on 05-14-2020 at 10:00 am

Mentor SerDes Simulation

Over the years SerDes (serializer/deserializer) based connections have proliferated into just about every connection within and among computing systems. Years ago, parallel interfaces were the most common method of moving data, but issues of signal integrity, synchronization and power simply became too much for the required… Read More


Accelerating 5G Innovation and Reliability Through Simulation and Advanced FinFET Design

Accelerating 5G Innovation and Reliability Through Simulation and Advanced FinFET Design
by Camille Kokozaki on 02-14-2019 at 7:00 am

In an ANSYS seminar held at DesignCon 2019, Dr. Larry Williams, ANSYS Director of Technology, outlined how 5G design innovation can be accelerated through simulation. He posited that 5G will become a general-purpose technology that affects an entire economy, drastically alter societies and unleash a cascade of complementary… Read More