PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions

PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions
by Kalar Rajendiran on 12-15-2021 at 6:00 am

Avery PCIe Speed Adapter IP at Work

We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More


Successful SoC Debug with FPGA Prototyping – It’s Really All About Planning and Good Judgement

Successful SoC Debug with FPGA Prototyping – It’s Really All About Planning and Good Judgement
by Daniel Nenni on 10-21-2021 at 6:00 am

ProtoBridge Debug Blog 181021

Using FPGAs to prototype and debug SoCs as part of the SoC design verification hierarchy was pioneered by Quickturn Design Systems in the late 1980’s, and I have observed a wide variety of FPGA prototyping projects over the years.  In retrospect, three factors have determined the success of the FPGA prototyping project;

  1. A good
Read More

Podcast EP35: Benefits of FPGA Based Prototyping

Podcast EP35: Benefits of FPGA Based Prototyping
by Daniel Nenni on 08-27-2021 at 10:00 am

Dan is joined by Ying Chen, VP of marketing & international sales at S2C. Dan and Ying explore the various uses and benefits of FPGA-based prototyping, including the different architectures available and cloud access.

Mr. Chen is a dynamic technologist with over 23 years of technical and business experiences in digital … Read More


The Quest for Bugs: “Shift-Left, Right?”

The Quest for Bugs: “Shift-Left, Right?”
by Bryan Dickman on 08-10-2021 at 10:00 am

Quest for Bugs Shift Left EDA

Shift-left, why?

Shift-left testing is an approach to software and system testing which is performed earlier in the lifecycle (that is, moved left on the project timeline). It is the first half of the “Test early and often” maxim that was coined by Larry Smith in 2001.

It’s now an established idea, much talked about … Read More


Prototypical II PDF is now available!

Prototypical II PDF is now available!
by Daniel Nenni on 08-02-2021 at 6:00 am

Prototypical II

Our latest book has finally been published! A PDF version of “Prototypical II – The Practice of FPGA Prototyping for SoC Design” is now available in the SemiWiki book section. The first book “Prototypical – The Emergence of FPGA Prototyping for SoC Design” was published in 2016 and a lot … Read More


CEO Interview: Toshio Nakama of S2C EDA

CEO Interview: Toshio Nakama of S2C EDA
by Daniel Nenni on 05-21-2021 at 6:00 am

Toshio Nakama SemiWiki

Toshio Nakama is the founder and the CEO of S2C and also a strong advocate of FPGA accelerated ASIC/SoC design methodology. Mr. Nakama devotes much of his time in promoting scalable Prototyping/Emulation hardware architecture and defining automated software specifications. He first started his career at Altera in 1997 and … Read More


Prototyping with the Latest and Greatest Xilinx FPGAs

Prototyping with the Latest and Greatest Xilinx FPGAs
by Daniel Nenni on 11-11-2020 at 6:00 am

Prototyping with the Latest and Greatest Xilinx FPGAs

I was reading the S2C press release announcing their new FPGA prototyping platform based on the Xilinx UltraScale+ VU19P FPGA, and how the new FPGA will accelerate billion gate FPGA prototyping, and I was struck by the stunning implications of this announcement.  Not that billion gate SoC designs can now be prototyped with FPGAs,… Read More


The Quiet Giant in Verification IP and More

The Quiet Giant in Verification IP and More
by Mike Gianfagna on 04-21-2020 at 10:00 am

SmartDV Market Coverage

In the technology industry, we’re all used to the hype about the latest and greatest. Semiconductor IP participates in the over-drive news cycle from time to time as well. So, when I see a company that has real, solid credentials but has resisted the temptation to over-hype, it gets my attention. I had an experience like this recently… Read More


Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards

Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards
by Daniel Nenni on 03-09-2020 at 6:00 am

Aldec Webinar SemiWiki

Before starting your next FPGA Prototyping Project you should catch the next SemiWiki webinar – “Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards”, in partnership with Aldec.

A significant portion of my  30+ years in the EDA industry has revolved around design verification with some form of FPGA … Read More


S2C Delivers FPGA Prototyping Solutions with the Industry’s Highest Capacity FPGA from Intel!

S2C Delivers FPGA Prototyping Solutions with the Industry’s Highest Capacity FPGA from Intel!
by Daniel Nenni on 11-19-2019 at 6:00 am

In 2016 we published our book “Prototypical: The Emergence of FPGA-Based Prototyping for SoC Design” which began an incredible journey through ASIC prototyping. While we are working on an update to that book there is some recent Prototyping news that is worthy of praise.

First and foremost, S2C Inc. has just announced THE single… Read More