Machine Learning to Accelerate Electronic Design

Machine Learning to Accelerate Electronic Design
by Admin on 06-10-2020 at 8:00 am

Register For This Web Seminar

Online – Jun 10, 2020
8:00 AM – 9:00 AM US/Pacific

Online – Jun 10, 2020
3:00 PM – 4:00 PM US/Pacific

Overview

The Golden Age of machine learning is upon EDA. Over the last few years, we have seen companies grow their ML teams and strategies, and ML research projects

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ISQED’20 – 21st International Symposium on Quality Electronic Design

ISQED’20 – 21st International Symposium on Quality Electronic Design
by Ali on 03-25-2020 at 12:00 am

isQED is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve total design quality.… Read More


FD-SOI, FinFET, 3D in Monterey

FD-SOI, FinFET, 3D in Monterey
by Paul McLellan on 04-09-2014 at 5:40 pm

Last night the IEEE Silicon Valley Chapter had a panel session that was in some ways a preview of some of what will be discussed at the Electronic Design Process Symposium in Monterey next Thursday and Friday. At EDPS Herb Reiter organized a session on FinFET, 3DIC and FD-SOI (sort of how many buzzwords can you get into one set of titles).… Read More


EDPS Monterey

EDPS Monterey
by Paul McLellan on 03-17-2012 at 8:00 am

Every year in Monterey is a relatively small conference that looks at the design process, EDPS, the electronic design process symposium. I gave a keynote there a couple of years ago, but you don’t have to listen to me this time. The keynotes are from:

  • 1st day: Misha Buric, CTO of Altera, talking about SoC FPGAs and other things
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