Tag: ee times

Webinar: Connecting Chiplets Isn’t Enough – Solving the Data Movement Challenge in Multi-Die Systems

Webinar: Connecting Chiplets Isn’t Enough – Solving the Data Movement Challenge in Multi-Die Systems
by Admin on 10-27-2026 at 11:23 pm

Thursday, November 5, 2026

11:00am PST | 2:00pm EST | 20:00 CET

As SoCs evolve into multi-die systems, getting data across a die-to-die interface is only part of the challenge. Architects must also preserve traffic behavior, bandwidth efficiency and quality of service as communication moves across physical chip boundaries.

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Webinar: Silicon Catalyst & EE Times Examine the Bigger Picture Aspects of AI – Nov. 29, 2023 – 9am to 10am Pacific

Webinar: Silicon Catalyst & EE Times Examine the Bigger Picture Aspects of AI – Nov. 29, 2023 – 9am to 10am Pacific
by Mike Gianfagna on 11-20-2023 at 2:00 pm
Categories: AI, Events, Semiconductor Services, Silicon Catalyst

Webinar Silicon Catalyst & EE Times Examine the Bigger Picture Aspects of AI – Nov. 29, 2023 – 9am to 10am Pacific

Artificial Intelligence (AI) is dominating the news cycle these days. It used to be about the latest (and largest) chips to accelerate AI algorithms. While that’s still relevant and exciting, AI news is taking a much broader, socioeconomic character. What does AI mean for job security, the economy, or even life on Earth? These … Read More

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Meet the POWER9 Chip Family

Meet the POWER9 Chip Family
by Alan Radding on 09-30-2016 at 12:00 pm
Categories: EDA

When you looked at a chip in the past you primarily were concerned with two things: the speed of the chip, usually expressed in GHz, and how much power it consumed. Today the IBM engineers preparing the newest POWER chip, the 14nm POWER9, are tweaking the chips for the different workloads it might run, such as cognitive or cloud, and… Read More