4 goals of memory resource planning in SoCs

4 goals of memory resource planning in SoCs
by Don Dingee on 03-21-2016 at 4:00 pm

The classical problem every MBA student studies is manufacturing resource planning (MRP II). It quickly illustrates that at the system level, good throughput is not necessarily the result of combining fast individual tasks when shared bottlenecks and order dependency are involved. Modern SoC architecture, particularly … Read More


How to Gain Low-Power at High-Performance

How to Gain Low-Power at High-Performance
by Pawan Fangaria on 11-28-2015 at 12:00 pm

In a world of smart devices, high performance is required in order to address several specific needs such as intelligent and immediate data processing for IoT applications, instant response from mobile devices, highly interactive user interfaces, and so on. Most of these devices are battery operated and hence require lower … Read More


How to prevent execution surprises for Cortex-M7 MCU?

How to prevent execution surprises for Cortex-M7 MCU?
by Eric Esteve on 08-06-2015 at 11:00 am

ARM Cortex-A series processor core (A57, A53) are well known in the high performance market segments, like Application Processor for smartphone, Set-Top-Box or networking. If you look at the electronic market you realize that multiple applications are cost sensitive and doesn’t need such high performance processor core. … Read More