Alchip at TSMC OIP – Reticle Size Design and Chiplet Capabilities

Alchip at TSMC OIP – Reticle Size Design and Chiplet Capabilities
by Mike Gianfagna on 09-04-2020 at 10:00 am

Alchip machine learning design

This is another installment covering TSMC’s very popular Open Innovation Platform event (OIP), held on August 25. This event presents a diverse and high-impact series of presentations describing how TSMC’s vast ecosystem collaborates with each other and with TSMC.  This presentation is from Alchip, presented by James Huang,… Read More


Synopsys’ New Die-to-Die PHY IP – What It Means

Synopsys’ New Die-to-Die PHY IP – What It Means
by Randy Smith on 10-29-2019 at 10:00 am

This morning, Synopsys announced its new Die-to-Die PHY IP. This announcement is critically important as it addresses two major market drivers – the growing need for faster connectivity in the datacenter and similar markets, and a path to better exploit the latest processes by dealing with yield issues for larger dies in a different… Read More