As RTL design started to increase in the late 1980’s and early 1990’s, it was becoming apparent that some amount of management was needed to keep track of all the design files and their associated versions. Because of the parallels to software development, design teams looked to the tools and methodologies that were in use by software… Read More
Tag: designsync
Consolidation and Design Data Management
Consensia, a Dassault Systemès channel partner, recently hosted a webinar on DesignSync, a long-standing pillar of many industry design flows (count ARM, Qualcomm, Cavium and NXP among their users). A motivation for this webinar was the impact semiconductor consolidation has had on the complexity of design data management,… Read More
Webinar: Next Generation Design Data & Release Management
Design Data Management (DDM) is a bit like insurance. It’s something every semiconductor company has to have, and as a result it’s probably something taken for granted. In order to make their products more useful, the DDM vendors have added more functionality to manage more of the lifecycle of design data.
Dassault’s Synchronicity… Read More
Webinar – Next Generation DDRM Needs, Solutions
I’m a believer in product life-cycle management (PLM) for semiconductor design. It’s not an attention-grabbing topic like faster verification or improved PPA in implementation, but now massive IP-based design is routine, IP’s are sourced from multiple suppliers each cycling though multiple revisions and now that design … Read More
CEO Interview: Sanjay Keswani of Consensia
Sanjay Keswani founded Consensia in 2013. He has deep experience in the high-tech industry, guiding some of the world’s high profile technology brands through complex innovation and business transformation projects including companies such as Atmel, KLA-Tencor, Hughes Aircraft, and Motorola Mobility. Consensia customers… Read More
Enterprise Design Management Comes of Age
The motivations for having a data and process management system in place for semiconductor design have existed for a long time. I am reluctant to admit it, but I remember early efforts to do this back in the 80’s at Valid Logic. Cadence was also developing this capability in house through the early 90’s. Back then designs were much … Read More
Smart Collaborative Design Reduces Business Risk
The semiconductor design industry is ever challenged with increasing chip density, manufacturing complexity with cutting-edge technologies, accommodating multiple IPs with different functionalities from various sources, optimizing power, performance and cost, maximizing manufacturability and reliability and still… Read More
Enterprise IP Management – A Whole New Gamut in Semiconductor Space
The world of IPs in the semiconductor landscape has completely changed the semiconductor design scenario, specifically the fabless design space. Today IPs are key components of any large semiconductor design, in the same way as auto ancillaries in auto design. It’s just the beginning, in the days to come we will see SoCs just as… Read More
Flexible Integration System for IPs into SoC
The number of IPs with growing complexity and heterogeneity is ever increasing (counting into hundreds) to be integrated into a single SoC. It’s not possible to have them all available at once and in a single repository for the integration engineers to assemble all of them together and integrate into the SoC. The reality is that … Read More
An EDA update from Dassault Systemes at DAC
I first met Michael Munseyback at Viewlogic in the 1990’s, so was pleased to meet with him at DACand get an update on what Dassault Systemes has to offer the EDA world.
Michael Munsey, Dassault Systemes