At its 2026 Technology Symposium, TSMC delivered a clear message: the AI era has entered a new phase. The primary constraint is no longer model capability, but the systems required to run those models at scale. Addressing this shift will demand significant advances in semiconductor technology, spanning compute, memory, interconnects,… Read More
Yes, it is that time of year again, the 2026 TSMC Technology Symposium kick-off event in Silicon Valley. TSMC has never been in a better position to forecast the future of semiconductor technology and the industry itself. TSMC closely collaborates with the top semiconductor companies around the world and the top players in the … Read More
As semiconductor scaling slowed and system performance became increasingly constrained by data movement rather than raw compute, advanced packaging emerged as a decisive lever. Among these technologies, TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) represents a turning point in how high-performance systems are … Read More
In a significant example of how high-tech manufacturing can embrace environmental stewardship without compromising operational excellence, Taiwan Semiconductor Manufacturing Company has launched a sustainability initiative within its advanced packaging operations that both reduces waste and generates meaningful… Read More
In a landmark presentation at the 2025 IEEE Electronic Components and Technology Conference (ECTC), TSMC unveiled a groundbreaking advancement in thermal management: Direct-to-Silicon Liquid Cooling integrated directly onto its CoWoS® platform. This innovation, detailed in the paper “Direct-to-Silicon Liquid… Read More
In a significant milestone for the semiconductor industry, Teradyne was honored as the 2025 TSMC Open Innovation Platform® Partner of the Year for TSMC 3DFabric® Testing. This award, announced on September 25, 2025, underscores the deep collaboration between Teradyne, a leader in automated test equipment and robotics, and… Read More
Today Alchip Technologies, a Taipei-based leader in high-performance and AI computing ASICs, announced a significant milestone with the successful tape-out of its 3D IC test chip. This achievement not only validates Alchip’s advanced 3D IC ecosystem but also positions the company as a frontrunner in the rapidly evolving field… Read More
Chip on Panel on Substrate, often shortened to CoPoS, extends the familiar idea of chip on carrier packaging by moving the redistribution and interposer style structures from circular wafers to large rectangular panels. The finished panel assembly is then mounted on an organic or glass package substrate. This shift from round
Alchip Technologies Ltd., a global leader in high-performance computing (HPC) and artificial intelligence (AI) ASIC design and production services, continues its trajectory of rapid growth and technical leadership by pushing the boundaries of advanced-node silicon, expanding its global design capabilities, and building… Read More
The main program for the 70th IEDM opened on Monday morning in San Francisco with an excellent keynote from Dr. Yuh-Jier Mii, Executive Vice President and Co-Chief Operating Officer at TSMC. Dr. Mii joined TSMC in 1994. Since then, he has contributed to the development and manufacturing of advanced CMOS technologies in both fab
