Like most technology firms, Apple has been home to many successes, and some spectacular defeats. One failure was Project Aquarius. At the dawn of the RISC era, before ARM architecture was “discovered” in Cupertino, engineers were hunkered over a Cray X-MP/48. The objective was to design Apple’s own quad core RISC processor to … Read More
Octa-core sells smartphones and tablets. 64-bit ARM Cortex-A53 implementations are available from Huawei, MediaTek, Qualcomm, Samsung, and now Marvell, with Rockchip and others on the way. Suddenly, almost everyone planning to run Linux is being asked for octa-core designs.
If it were easy, anyone could do it. Increasing … Read More
The concept and use of virtual prototypes continues to grow each year in electronics design, mostly because it really does shorten product development cycles by allowing software engineers to start early debug and fix errors prior to production. Other useful benefits to virtual prototyping include software optimization, … Read More
Started in 2002 Carbon Design Systems has ESL (Electronic System Level) modeling and validation tools for complex SoC design. With their software you can:
- Perform system level model generation of existing and 3rd party IP directly from RTL for use in any virtual platform
- Do performance analysis & optimization of SoC architectures
Using a virtual prototype for your SoC design is accepted, conventional wisdom today because it can save development time by eliminating design iterations and avoid costly bugs that will cause an expensive product recall. In order to simulate your virtual prototype you need models, so a major question has always been, “Where… Read More
The amount of time spent debugging an SoC dwarfs the actual design time, with many engineering teams saying that debug and verification takes about 7X the effort as the actual design work. So any automation to reduce the amount of time spent in debug and verification would directly impact the product schedule in a big way.
An example… Read More
Most SoC designs these days consist largely, but not entirely, of purchased IP blocks. But there are lots of tradeoffs involved in selecting IP blocks, and since those tradeoffs change with process node, even decisions that seem “obvious” based on the last generation of the design, may not be so clear cut. Even if you… Read More
Power is a fundamentally hard problem. When you have finished the design, you have accurate power numbers but can’t do anything about them. At the RTL level you have some power information but it is often too late to make major architectural changes (add an offload audio-processor, for example). Early in the design, making… Read More
I’ve talked before about how venture capitalists will no longer invest in EDA companies since the prospect for a huge return just isn’t there any more. By big return I mean an acquisition at hundreds of millions of dollars, like SPC, CCR, Ambit, Cadmos, Simplex. But we all know that chips cannot be designed without software… Read More
Virtual platforms have been an area that has some powerful value propositions for both architectural analysis and for software development. But the fundamental weakness has been the modeling problem. People want fast and accurate models but this turns out to be a choice.
The first issue is that there is an unavoidable tradeoff… Read More