Costello on Communicating a Compelling Company Story

Costello on Communicating a Compelling Company Story
by Paul McLellan on 03-14-2013 at 11:53 pm

The next EDAC sponsored emerging company series (what I’ve been calling Hogan University) is Joe Costello being interviewed on how to communicate a compelling company story. Anyone who saw Joe’s keynote at DAC several years ago will not want to miss this. I can’t promise that he’ll lie down on the stage… Read More


Will next generation Mobile Devices support PCI Express? M-PCIe is coming fast!

Will next generation Mobile Devices support PCI Express? M-PCIe is coming fast!
by Eric Esteve on 03-14-2013 at 6:22 am

Those who have read the numerous articles I have written about MIPI, or PCIe, or the fusion of both named “Mobile Express” know my position: the question is not “Will Mobile devices support PCI Express?” but “When will we see Mobile devices integrating Mobile Express?” I was not really surprised by the Press Release that Cadence … Read More


Samsung and the New World Order!

Samsung and the New World Order!
by Daniel Nenni on 03-12-2013 at 7:52 pm

The keynotes at CDNLive today were very interesting, but rather than cover the slides and bullet points let me share with you my personal view of Samsung and how they are changing the semiconductor industry. Before I continue remember I’m just a blogger who shares observations, experiences, and opinions. This blog is for entertainment… Read More


Virtual Platforms, Acceleration, Emulation, FPGA Prototypes, Chips

Virtual Platforms, Acceleration, Emulation, FPGA Prototypes, Chips
by Paul McLellan on 03-12-2013 at 7:13 pm

At CDNLive today Frank Schirrmeister presented a nice overview of Cadence’s verification capabilities. The problem with verification is that you can’t have everything you want. What you really want is very fast runtimes, very accurate fidelity to the hardware and everything available very early in the design … Read More


Cadence To Acquire Tensilica

Cadence To Acquire Tensilica
by Paul McLellan on 03-11-2013 at 5:54 pm

You have probably already seen the news: Cadence is acquiring Tensilica for $380M. Cadence has been relatively late to the IP party compared to Synopsys. In contrast, Mentor was early, got into the IP business before it was really profitable and ended up shutting down the business.

Tensilica is quite sizable. It has over 200 licensees,… Read More


We are Live at CDNLive 2013!

We are Live at CDNLive 2013!
by Daniel Nenni on 03-10-2013 at 7:00 pm

Dr. Paul McLellan and I will be covering CDNLive this week, one of the premier EDA events of the year. Take a look at the agenda and exhibits, this year it looks like a full on Design Automation Conference! There is definitely something for everyone!

Get ready for two full days of content with more than a hundred tracks and keynotes by… Read More


Modern Data Management

Modern Data Management
by Paul McLellan on 03-01-2013 at 12:17 pm

Most mixed-signal design teams don’t use data management. Well, that’s not entirely true, everyone has to do data management of some sort, it is just that it is often very ad hoc, often done by some vaguely systematic way of doing file naming, using email to keep track of changes, no access control and so on. This leads… Read More


When the lines on the roadmap get closer together

When the lines on the roadmap get closer together
by Don Dingee on 02-28-2013 at 12:53 pm

Tech aficionados love roadmaps. The confidence a roadmap instills – whether using tangible evidence or just a good story – can be priceless. Decisions on “the next big thing”, sometimes years and a lot of uncertain advancements away, hinge on the ability of a technology marketing team to define and communicate a roadmap.

Any roadmap… Read More


FinFET Design Challenges at 14nm and 10nm

FinFET Design Challenges at 14nm and 10nm
by Daniel Payne on 02-25-2013 at 11:09 am

speaker vassiliosgerousis

At DAC 2012 we were hearing about the 20nm design ecosystem viability, however IC process technology never stands still so we have early process development going on now at the 10nm and 14nm nodes where FinFET technology is being touted. Earlier in February Vassilios Gerousis, a distinguished engineer at Cadence presented a session… Read More


Cadence ♥ ClioSoft!

Cadence ♥ ClioSoft!
by Daniel Nenni on 02-20-2013 at 5:00 pm

Taking a look at the coveted presentation slots at the CDNLive Conference next month you will see a presentation on Data Management for Mixed-Signal Designs by one of my favorite EDA companies, ClioSoft. Great software, great support, great people, and with customers that are willing to talk publicly about their tools and technology.… Read More