BDD-Based Formal for Floating Point. Innovation in Verification

BDD-Based Formal for Floating Point. Innovation in Verification
by Bernard Murphy on 02-27-2024 at 6:00 am

Innovation New

A different approach to formally verifying very challenging datapath functions. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome. We’re planning to add a wrinkle… Read More


Arm Neoverse Continues to Claim Territory in Infrastructure

Arm Neoverse Continues to Claim Territory in Infrastructure
by Bernard Murphy on 02-21-2024 at 10:00 am

Neoverse announcement min

After owning general purpose compute in cell phones and IoT devices, it wasn’t clear what Arm’s next act might be. Seemingly the x86 giants dominated in datacenters and  auguries suggested a bloody war in smaller platforms between Arm and RISC-V. But Arm knew what they were doing all along, growing upwards into infrastructure:… Read More


Cadence Debuts Celsius Studio for In-Design Thermal Optimization

Cadence Debuts Celsius Studio for In-Design Thermal Optimization
by Bernard Murphy on 02-21-2024 at 6:00 am

Celsius Studio min

Continuing the multiphysics theme, I talked recently with Melika Roshandell (Product Management Director at Cadence) on the continuing convergence between MCAD and ECAD. You should know first that Melika has a PhD in mechanical engineering and an extensive background in thermal engineering at Broadcom and Qualcomm, all very… Read More


Moderating Our Open Chiplet Enthusiasm. A NoC Perspective

Moderating Our Open Chiplet Enthusiasm. A NoC Perspective
by Bernard Murphy on 02-14-2024 at 6:00 am

Moderating Open Chiplet Enthusiasm

I recently talked with Frank Schirrmeister (Solutions & Business Development, Arteris) on the state of progress to the open chiplet ideal. You know – where a multi-die system in package can be assembled with UCIe (or other) connections seamlessly connecting data flows between dies. If artificial general intelligence and… Read More


SOITEC Pushes Substrate Advantages for Edge Inference

SOITEC Pushes Substrate Advantages for Edge Inference
by Bernard Murphy on 02-08-2024 at 6:00 am

FD SOI power min

You might not immediately see a connection between semiconductor substrate choices and inference at the edge. These technology layers seem worlds apart and yet SOITEC have a point. Edge AI has rapidly evolved from simple CNNs to now complex reinforcement learning systems and transformer based LLMs. Even when shrunk to edge footprints,… Read More


Expedera Proposes Stable Diffusion as Benchmark for Edge Hardware for AI

Expedera Proposes Stable Diffusion as Benchmark for Edge Hardware for AI
by Bernard Murphy on 02-05-2024 at 6:00 am

Stable diffusion image min

A recent TechSpot article suggests that Apple is moving cautiously towards release of some kind of generative AI, possibly with iOS 18 and A17 Pro. This is interesting not just for Apple users like me but also for broader validation of a real mobile opportunity for generative AI. Which honestly had not seemed like a given, for multiple… Read More


Cadence Claims the CFD High Ground with a New GPU-Based Accelerator

Cadence Claims the CFD High Ground with a New GPU-Based Accelerator
by Bernard Murphy on 02-01-2024 at 6:00 am

J24135 Millennium Press Image 400x400 min

For observers of EDA markets there is an easily overlooked opportunity for new growth. Today around 50% of EDA revenues come from systems rather than semiconductor companies, from datacenters to automotive, aerospace, energy, and others. In most of these industries total system design depends as much on mechanical and other… Read More


2023 Retrospective. Innovation in Verification

2023 Retrospective. Innovation in Verification
by Bernard Murphy on 01-25-2024 at 6:00 am

Innovation New

As usual in January we start with a look back at the papers we reviewed last year. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome. We’re planning on starting a live series… Read More


Blending Finite Element Methods and ML

Blending Finite Element Methods and ML
by Bernard Murphy on 01-23-2024 at 6:00 am

FEM mesh min

Finite element methods for analysis crop up in many domains in electronic system design: mechanical stress analysis in multi-die systems, thermal analysis as a counterpart to both cooling and stress analysis (eg warping) and electromagnetic compliance analysis. (Computational fluid dynamics – CFD – is a different beast which… Read More


An Accellera Functional Safety Update

An Accellera Functional Safety Update
by Bernard Murphy on 01-10-2024 at 10:00 am

Fusa interoperability min

In May of 2021 Accellera released a first white paper on the challenges they hope to address with their functional safety standard, together with the scope and goals they set for themselves. One major goal in this effort has been exchange and integration of functional safety data between different tools and flow and particularly… Read More