Quadric’s Chimera GPNPU IP Blends NPU and DSP to Create a New Category of Hybrid SoC Processor

Quadric’s Chimera GPNPU IP Blends NPU and DSP to Create a New Category of Hybrid SoC Processor
by Kalar Rajendiran on 11-01-2022 at 10:00 am

Memory Optimization Equals Power Minimization

Performance, Power and Area (PPA) are the commonly touted metrics in the semiconductor industry placing PPA among the most widely used acronyms relating to chip development. And rightly so as these three metrics greatly impact all electronic products that are developed. The degree of impact depends of course on the specific … Read More


CEVA Accelerates 5G Infrastructure Rollout with Industry’s First Baseband Platform IP for 5G RAN ASICs

CEVA Accelerates 5G Infrastructure Rollout with Industry’s First Baseband Platform IP for 5G RAN ASICs
by Kalar Rajendiran on 10-04-2022 at 6:00 am

PentaG RAN Massive MIMO Radio Platform

The 5G technology market is huge with incredible growth opportunities for various players within the ecosystem. As a leading cellular IP provider, CEVA has been staying on top of the opportunity by offering solutions that enable customers to bring differentiated products to the marketplace. Earlier this year, SemiWiki postedRead More


The Quest for Bugs: “Correct by Design!”

The Quest for Bugs: “Correct by Design!”
by Bryan Dickman on 07-04-2021 at 6:00 am

Title Image

In this article we take an objective view of Virtual Prototyping from the engineering lens and the “quest to find bugs”. In this instance we discuss the avoidance of bugs in terms of architecting complex ASICs to be “correct by design”.

AI Challenges

It is not surprising to find out that other areas of human endeavour, beyond semiconductor… Read More


CEO Interview: Rich Weber of Semifore, Inc.

CEO Interview: Rich Weber of Semifore, Inc.
by Daniel Nenni on 04-30-2021 at 6:00 am

Rich Weber

Rich Weber co-founded Semifore in 2006 with Jamsheed Agahi. Rich has a long history of complex chip and system design at companies including Data General, Stardent, Silicon Graphics, StratumOne and Cisco Systems. He received an MS in Electrical Engineering and a BS in Computer Engineering from the University of Illinois, Urbana-Champaign.… Read More


CEO Interview: Dr. Shafy Eltoukhy of OpenFive 

CEO Interview: Dr. Shafy Eltoukhy of OpenFive 
by Daniel Nenni on 03-05-2021 at 6:00 am

Shafy Eltoukhy

Dr. Shafy Eltoukhy has over 35 years of experience in the semiconductor industry. He served as VP and BU manager of the Analog Mixed Signal Group at Microsemi. He was the VP of Operations and Technology Development at Open-Silicon. He was the VP of Technology at Lightspeed Semiconductor where he joined the founding team that invented… Read More


The Quest for Bugs: Dilemmas of Hardware Verification

The Quest for Bugs: Dilemmas of Hardware Verification
by Bryan Dickman on 02-28-2021 at 6:00 am

The Quest for Bugs Dilemmas of Hardware Verfication

Functional Verification for complex ASICs or IP-Core products is a resource limited ‘quest’ to find as many bugs as possible before tape-out or release. It can be a long, difficult and costly search that is constrained by cost, time and quality. The search space is practically infinite, and 100% exhaustive verification is an unrealisticRead More


CEO Interview: Murilo Pilon Pessatti of Chipus Microelectronics

CEO Interview: Murilo Pilon Pessatti of Chipus Microelectronics
by Daniel Nenni on 09-21-2020 at 6:00 am

MuriloPessatti Photo

Murilo Pilon Pessatti is an Electrical Engineer with a MSEE in Analog IC design. He studied in Brazil at São Paulo University (USP) and earned a masters at Campinas State University (UNICAMP). Murilo then moved to Lisbon in Europe to work for ChipIdea, in the early 2000’s when the smartphone era was just taking off.

“I… Read More


Webinar: ASICs Unlock Deep Learning Innovation

Webinar: ASICs Unlock Deep Learning Innovation
by Daniel Nenni on 04-27-2018 at 12:00 pm

In March, an AI event was held at the Computer History Museum entitled “ASICs Unlock Deep Learning Innovation.” Along with Samsung, Amkor Technology and Northwest Logic, eSilicon explored how these companies form an ecosystem to develop deep learning chips for the next generation of AI applications. There was also a keynote … Read More


Achronix Momentum Building with Revenue Growth, Product/Staff Expansion, New HQ

Achronix Momentum Building with Revenue Growth, Product/Staff Expansion, New HQ
by Camille Kokozaki on 04-27-2018 at 7:00 am

5G Wireless, Network Acceleration, Data centers, Machine Learning, Compression, Encryption fueling the Growth

Building on its increasing momentum, Achronix Semiconductor Corporation held a ribbon-cutting ceremony on Tuesday, April 25, with the presence of Santa Clara’s Mayor Lisa Gillmor, customers, and partners, employees
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