LIVE WEBINAR: RISC-V Instruction Set Architecture: Enhancing Computing Power

LIVE WEBINAR: RISC-V Instruction Set Architecture: Enhancing Computing Power
by Daniel Nenni on 03-29-2024 at 8:00 am

RISC V Banner SemiWiki

In the dynamic landscape of chip design, two trends stand out as game-changers: the rise of the RISC-V instruction set architecture (ISA) and the advent of Software Defined products. Today, we delve into why these trends are not just shaping the industry but propelling companies like Andes and Menta to the forefront of innovation.… Read More


Podcast EP144: How Andes Supplies RISC-V Cores to the World with Frankwell Lin

Podcast EP144: How Andes Supplies RISC-V Cores to the World with Frankwell Lin
by Daniel Nenni on 02-17-2023 at 10:00 am

Dan is joined by Frankwell Lin. Frank co-founded Andes Technology in 2005 and served as President from 2006. He became Chairman and CEO in 2021. Under his leadership, Andes is recognized as a top supplier of embedded CPU IP in the semiconductor industry.

Dan explores how Andes became such a strong supplier of RISC-V cores with Frank.… Read More


Podcast EP73: Adventures in Supercomputing with Luminous Computing and Andes Technology

Podcast EP73: Adventures in Supercomputing with Luminous Computing and Andes Technology
by Daniel Nenni on 04-22-2022 at 10:00 am

Dan is joined by Dr. Dave Baker, VP digital design at Luminous Computing and John Min, director of field applications at Andes Technology. Dave and John explore with Dan their collaboration to build high-performance supercomputers.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, … Read More


CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology

CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology
by Daniel Nenni on 03-11-2022 at 6:00 am

Frankwell Jyh Ming Lin

Frankwell Lin, Chairman of Andes Technology, started his career being as application engineer in United Microelectronics Corporation (UMC) while UMC was an IDM with its own chip products, he experienced engineering, product planning, sales, and marketing jobs with various product lines in UMC. In 1995, after four years working… Read More


Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators

Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators
by Kalar Rajendiran on 02-08-2022 at 10:00 am

Expedera DLA IP Benefits

Using the right tool for the job can be extremely important. Well, maybe not in the case of the famed chef Martin Yan who is notorious for using just one knife—a razor sharp wide blade cleaver that doubles as a spatula—for preparing anything and everything he cooks. For the rest of us, though, the right tools can make all the difference.… Read More


Optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation.’

Optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation.’
by Daniel Nenni on 07-01-2020 at 6:53 pm

☕️ Join the latest webinar with RISC-V international members Andes, Imperas, and UltraSoC on the use of virtual platforms and FPGA’s for RISC-V multicore SoCs, covering early SW development, HW verification and analysis for system level design optimization.

Part #1 of our AI & ML webinar series focused on architecture. … Read More


#56thDAC SerDes, Analog and RISC-V sessions

#56thDAC SerDes, Analog and RISC-V sessions
by Eric Esteve on 06-14-2019 at 5:00 am

The good news is that the next five DAC events will take place in Moscone Center in San Francisco! If going to Las Vegas from the Bay area is an easy trip, coming from Europe to Las Vegas makes it a 24+hours journey… One obvious consequence was the poor attendance to the exhibition floor. But let’s be positive and notice that the number… Read More


Webinar: How IoT Designs Driven by Cost Power Security

Webinar: How IoT Designs Driven by Cost Power Security
by admin on 02-08-2015 at 8:30 pm

SoCs being developed for the fast growth Internet-of-Things market will sell for and operate on a small fraction of the power of mobile devices’ chips. More importantly, IoT SoCs will be far more vulnerable to hacker attacks than the much better protected chips in portable devices. As a result, designers developing SoCs targeting… Read More


Migrating to Andes from 8051

Migrating to Andes from 8051
by Paul McLellan on 02-11-2014 at 5:21 pm

The 8051 microcontroller has been around for years…decades in fact. It was originally developed in 1980 by Intel. Back then it required 12 clock cycles per instruction but modern cores use just one. While it is still widely used, mostly as an IP core for SoCs, it is running out of steam despite running over 50 times faster than… Read More