TSMC Technologies for Mobile and HPC

TSMC Technologies for Mobile and HPC
by Alex Tan on 05-10-2018 at 12:00 pm

During TSMC 2018 Technology Symposium, Dr. B.J. Woo, TSMC VP of Business Development presented market trends in the area of mobile applications and HPC computing as well as shared TSMC progress in making breakthrough efforts in the technology offerings to serve these two market segments.

Both 5G and AI are taking the center stage… Read More


Moore’s Law Drives Foundries and IP Providers

Moore’s Law Drives Foundries and IP Providers
by Daniel Payne on 01-19-2018 at 7:00 am

2017 was a banner year for semiconductor sales as they topped $400B for the first time, an increase of some 20%, there is happiness in Silicon Valley, Taiwan, South Korea, and well, everywhere. With the foundries pushing to ever-smaller process dimensions and even going back to mature nodes and offering more variations that are… Read More


Embedded FPGA IP update — 2nd generation architecture, TSMC 16FFC, and a growing customer base

Embedded FPGA IP update — 2nd generation architecture, TSMC 16FFC, and a growing customer base
by Tom Dillinger on 05-31-2017 at 12:00 pm

Regular Semiwiki readers are aware that embedded FPGA (eFPGA) IP development is a rapidly growing (and evolving) technical area. The applications for customizable and upgradeable logic in the field are many and diverse — as a result, improved performance, greater configurable logic capacity/density, and comprehensive… Read More


TSMC Design Enablement Update

TSMC Design Enablement Update
by Tom Dillinger on 04-10-2017 at 12:00 pm

A couple of recent semiwiki articles reviewed highlights of the annual TSMC Technical Symposium recently held in Santa Clara (links here, here, and here). One of the captivating sessions at every symposium is the status of the Design Enablement for emerging technologies, presented at this year’s event by Suk Lee, Senior… Read More


Top 10 Updates from the TSMC Technology Symposium, Part I

Top 10 Updates from the TSMC Technology Symposium, Part I
by Tom Dillinger on 03-22-2017 at 7:00 am

Last week, TSMC held their 23rd annual technical symposium in Santa Clara. In the Fall, TSMC conducts the OIP updates from EDA/IP partners and customers. The theme of the Spring symposium is solely on TSMC’s technology development status and the future roadmap. Indirectly, the presentations also provide insight into … Read More


Power and Performance Optimization for Embedded FPGA’s

Power and Performance Optimization for Embedded FPGA’s
by Tom Dillinger on 02-22-2017 at 12:00 pm

Last month, I made a “no-brainer” forecast that 2017 would be the year in which embedded FPGA (eFPGA) IP would emerge as a key differentiator for new SoC designs (link to the earlier article here).

The fusion of several technical and market factors are motivating design teams to incorporate programmable logic functionality… Read More


TSMC (Apple) Update Q2 2015!

TSMC (Apple) Update Q2 2015!
by Daniel Nenni on 07-18-2015 at 8:00 pm

The TSMC quarterly conference call was last week and of course it stirred up quite a bit of controversy. Let me share with you my experience, observations, and opinions and maybe together we can come up with an accurate prediction for 2016. First let’s take a look at 20nm and what people now call the “Apple effect.”

Correct… Read More