The technical program for DAC 2012 has an exceptional quality of technical papers, panels, special sessions, WACI (Wild and Crazy Ideas), WIP (Work In Progress), full day tutorials and user-track. The program is tailored for researchers and developers focused on electronic design automation (EDA) and embedded systems and … Read More





Intel will NOT build ARM chips!
As I mentioned in my previous blog “NVIDIA Claims TSMC 20nm will not Scale?” Jen-Hsun Huang is a very entertaining guy. I always listen to the NVIDIA conference calls because you never know what he will say next. Clearly he is a smart guy so you have to ask yourself why all the rhetoric?
In the Forbes article NVIDIA: Intel should let us… Read More
IC Layout Design at Qualcomm
I first met Betty Pokerwinski of Qualcomm at LinkedIn in the group called IC Layout Designers. I post frequently on LinkedIn and a blog article on an EDA tool called Visual Design Diff from ClioSoft created quite a discussion, enough so that I contacted Betty to learn more about her IC layout group at Qualcomm.
Questions and Answers… Read More
The Art of Flows, Part II
Part I (here) looked at a bit of the history of scripting, makefiles and other approaches to more formally specify and institutionalize EDA design flows.
The most sophisticated tool I know that looks at this issue is RTDA’s FlowTracer.… Read More
Apple’s 4G Field of Dreams Build Out
As Apple begins to flood the market with a full line of mobile devices sporting 4G LTE communications capability, starting with the iPAD and soon to follow with Ivy Bridge based MAC Book Pros and then in the Fall with iPhone 5s, one has to ask will the carriers be able to keep pace in order for customers to have a satisfied user experience.… Read More
The Art of Flows, Part I
These days, the flows that are used to build semiconductor designs are rightly regarded as part of the intellectual property of the company that developed and used them.
But it didn’t always used to be that way.… Read More
Synopsys Users Group Silicon Valley 2012 Keynote: ARM
Keynote #2 at SNUG 2012 was John Cornish, VP Marketing at ARM. Why they sent a marketing person to speak in front of 2,000+ engineers I do not know. To top that, next time they should send a sales person and do a real dog and pony show. To find out more about John I checked his LinkedIn profile which was bare. So enough about John, lets hit … Read More
Synopsys Users Group Silicon Valley 2012 Keynote: Aart de Geus
SNUG Chairman John Busco opened the session with a few words about Aart de Geus, the silver anniversary of Synopsys, and some SNUG statistics. A whopping 2,500 people registered this year! Probably due to the Magma acquisition which is prominently displayed on “Welcome Magma Users” signs and on the flat screens which are everywhere.… Read More
Synopsys Validates EDA360?
Before I get too snarky here, I would like to thank Synopsys for the invitation to SNUG 2012 and including me with the professional editors at a 75 minute roundtable discussion with Synopsys CEO Aart de Geus. While Aart is not my favorite big EDA CEO (Wally Rhines of Mentor bought me lunch and returns my email), he is definitely the most… Read More
Synopsys: now in 3D
And no red and green glasses required.
I remember the first time I heard about a Through Silicon Via (TSV), punching a hole through the entire wafer to make an electrical connection at the back, like we do all the time in printed circuit boards with through plated holes. I thought someone was trying one on and trying to make me look a fool.… Read More
Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI