I’m looking forward to the 2013 TSMC Open Innovation Platform Ecosystem Forum to be held Oct. 1[SUP]st[/SUP] in San Jose. One paper in particular that has my attention is titled, “An Efficient and Accurate Sign-Off Simulation Methodology for High-Performance CMOS Image Sensors,” by Berkeley Design Automation & … Read More




The Significance of Apple’s 64 Bit A7
The disappointment amongst analysts is palpable. Dreams of low cost iphones for the masses were kicked away when Apple introduced their two new iphones at the same price points as the old ones. Clearly Apple is playing a different game than what most others are anticipating as the market runs to 5BU. The market has split into the land… Read More
Emerging Trend – Choose DRAM as per Your Design Need
Lately I was studying about new innovations in memory world such as ReRAM and Memristor. As DRAM (although it has become a commodity) has found its extensive use in mobile, PC, tablet and so on, that was an inclination too to know more about. While reviewing Cadence’s offering in memory subsystems, I came across this whitepaperwhich… Read More
Breaking news: Microsoft acquires Apple!
Despite the relative success of their latest smartphone, iPhone15s, the Cupertino firm had never been able to renew with the success of legendary iPhone5s, launched ten years ago, in 2011. As of today, we don’t know if Microsoft will keep iPhone and iPad product lines, or decide to provide these with a lethal injection…
Some history:… Read More
Intel Quark: Synthesizable Core?
At IDF Brian Krzanich gave the keynote. I won’t summarize the whole thing here but just talk about one part that was something they had actually managed to keep secret ahead of time: Quark.
Quark is a synthesizable core. It uses 1/10th power of Atom and is 1/5 size. Now I am writing this, I don’t know if this is a fair comparison… Read More
GlobalFoundries Expands in Singapore
GlobalFoundries has been in Singapore for a long time. Longer than GlobalFoundries has existed in fact. Chartered Semiconductor was started in Singapore in 1987 and GF acquired them in early 2010 less than a year after they were created by spinning out the manufacturing arm of AMD. When GF was started their state of the art fab was… Read More
Cadence Introduces Palladium XP II
Well, despite all the arguments in the blogosphere about what process node palladium’s silicon is, and whether the design team is competent, and why it reports into sales…Cadence has announced their latest big revision of Palladium. Someone seems to be able to get things done. Of course it is bigger and faster and … Read More
TSMC OIP: Mentor’s 5 Presentations
At TSMC’s OIP on October 1st, Mentor Graphics have 5 different presentations. Collect the whole set!
11am, EDA track. Design Reliability with Calibre Smartfill and PERC. Muni Mohan of Broadcom and Jeff Wilson of Mentor. New methodologies were invented for 28nm for smart fill meeting DFM requirements (and at 20nm me may … Read More
A Hybrid Test Approach – Combining ATPG and BIST
In the world of IC testability we tend to look at various approaches as independent means to an end, namely high test coverage with the minimum amount of test time, minimum area impact, minimum timing impact, and acceptable power use. Automatic Test Pattern Generation (ATPG) is a software-based approach that can be applied to any… Read More
Verifying Hardware at the C-level
As more people adopt high-level synthesis (HLS) they start to worry about what is the best design flow to be using. This is especially so for verification since it forms such a large part of the effort on a modern SoC. The more people rely on HLS for producing their RTL from C, the more they realize they had better do a good job of verifying… Read More
cHBM for AI: Capabilities, Challenges, and Opportunities