Build a 100% Python-based Design environment for Large SoC DesignsIn the fast-evolving world of semiconductor design, chip…Read More
Keysight EDA 2025 launches AI-enhanced design workflowsThe upcoming Keysight EDA 2025 launch has three…Read More
Changing RISC-V Verification Requirements, Standardization, InfrastructureA lively panel discussion about RISC-V and open-source…Read More
Semidynamics: A Single-Software-Stack, Configurable and Customizable RISC-V SolutionFounded with a vision to create transformative, customizable…Read More
Synopsys-Ansys 2.5D/3D Multi-Die Design Update: Learning from the Early AdoptersThe demand for high-performance computing (HPC), data centers,…Read More
I am a fan of product releases which bundle together multiple high-value advances. That approach reduces the frequency of releases (no bad thing) in exchange for more to offer per release, better proven through solid partner validation. The Dynamic Duo III release falls in this class, offering improvements in performance, capacity,… Read More
Khaled Maalej is founder and CEO of VSORA, a provider of high-performance silicon chips for GenerativeAI and L4/L5 autonomous driving (AD) applications based in France. Before founding VSORA in 2015, Maalej was CTO at DiBcom, a fabless semiconductor company that designed chipsets for low-power mobile TV and radio reception… Read More
Dan is joined by Bill DeVries, Vice President of Industry Transformation and Customer Success at Dassault Systémes. Bill is responsible for revenue growth and driving the use of the 3DEXPERIENCE platform. Additionally, Bill is the Senior Director of Academic and Education in North America, where he leads the 3DEXPERIENCE EDU… Read More
Soitec is a unique company that is at the center of major changes in our industry. Technology megatrends are fueling massive demand for semiconductors and this has increased the adoption of engineered substrates. As a global leader in the development of engineered substrates, Soitec is a company to watch. While this technology… Read More
The goal of SoC design teams is to tape-out their project and receive working silicon on the first try, without discovering any bugs in silicon. To achieve this lofty goal requires all types of specialized checking and verification during the design phase to prevent bugs. There are checks at the system level, RTL level, gate level,… Read More
Traditional simulation-based power analysis methods face insurmountable challenges to accurately capture complex designs activities in real-world scenarios. As the scale… Read More
Semidynamics takes a non-traditional approach to design enablement. Not long ago, the company’s Founder and CEO, Roger Espasa unveiled extreme customization at the RISC-V Summit. That announcement focused on a RISC-V Tensor Unit designed for ultra-fast AI solutions. Recently, at Embedded World 2024 the company took this … Read More
That datacenters are power hogs is not news, especially now AI is further aggravating this challenge. I found a recent proteanTecs-hosted panel on power challenges in datacenter infrastructure quite educational both in quantifying the scale of the problem and in understanding what steps are being taken to slow growth in power… Read More
Dan is joined by Randy Caplan, co-founder and CEO of Silicon Creations, and a lifelong technology enthusiast. For almost two decades, he has helped grow Silicon Creations into a leading mixed-signal semiconductor IP company with nearly 500 customers spanning almost every major market segment.
Randy provides some background… Read More
Winner and Runner-up to receive the contest’s largest ever technology credit for production tape-outs.
This is an example of why I enjoy working with Silicon Catalyst. They collaborate with our partners and do some really impressive things, all for the greater good of the semiconductor industry, absolutely. If you are not currently… Read More
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