CEVA, the leading licensor of wireless connectivity and smart sensing technologies, is advancing its full-stack wireless strategy with the introduction of next-generation Bluetooth High Data Throughput (HDT) capabilities and a major integrated RF subsystem design win. The announcement underscores CEVA’s growing role… Read More
Power-SOI: The Reliability Engine Behind Functional Safety ICsPower-SOI technology is rapidly emerging as a foundational…Read More
ASML High-NA EUV is Not Ready for High-Volume ProductionContrary to the popular press, ASML High-NA EUV…Read More
What Winemakers and Chip Designers Have in CommonConsider this a standout presentation at the Silicon…Read More
Learn How llmda Uses Agentic AI to Generate Hardware Docs & Keep Them ConsistentAccurate, complete, and consistent technical documentation is a…Read MoreTrusted Convergence Governance: Preserving Admissibility Integrity Across Heterogeneous Semiconductor Systems
As semiconductor systems evolve toward heterogeneous integration, chiplets, 2.5D and 3D packaging, distributed observability, runtime adaptation, Fleet Learning, and lifecycle convergence governance, the industry is entering a fundamentally new operational reality.
Convergence decisions are no longer driven only… Read More
Are You Ready for Spec-Driven Verification?
Quick recap: verification is checking that your implementation of a design matches the in-house design/test specification. In contrast, validation means checking that the implementation matches design intent as defined by a customer specification, use cases, etc. Let’s focus on verification; for simplicity I’ll use “design… Read More
TSMC Powers Up: 408,000 Batteries Get a Safety Intelligence Upgrade
As semiconductor manufacturing becomes increasingly dependent on uninterrupted power and energy efficiency, battery reliability has emerged as a critical operational issue for advanced fabs. Taiwan Semiconductor Manufacturing Company, better known as TSMC, is addressing this challenge through an ambitious global initiative… Read More
Library Characterization gets a Boost from AI
The semiconductor industry creates increasingly complex SoC and chiplets using lots of IP and all of that IP needs to be characterized at the cell level. As we design with 3nm and 2nm nodes, the sheer volume of data required for accurate static timing analysis (STA) is greatly increasing. Modern design flows rely on characterized… Read More
Power-SOI: The Reliability Engine Behind Functional Safety ICs
Power-SOI technology is rapidly emerging as a foundational platform for next-generation functional safety integrated circuits used in autonomous vehicles, industrial automation, humanoid robotics, and other mission-critical systems. The growing convergence of high-voltage power management and low-voltage digital… Read More
CEO Interview with Vivek Raghunathan of Xscape Photonics
Vivek Raghunathan has over 18 years of experience in silicon photonics. He was a Sr. Principal Engineer, Product Architect and Program Leader for Integrated Silicon Photonics at Broadcom driving key core technology development required to co-package optics with switches and demonstrated industry’s first 25.6T Ethernet … Read More
CEO Interview with Baratunde Cola of Carbice
Baratunde Cola is the CEO and founder of Carbice, an Atlanta, Georgia-based company that develops scalable interface solutions to protect semiconductors and electrical components from overheating in any physical environment. He received his bachelor’s and master’s degrees from Vanderbilt University and … Read More
Podcast EP347: Agentic Workflows from Caspia Technologies for Advanced Chip Security Verification with Stuart Audley
Daniel is joined by Stuart Audley, vice president and general manager of product management at Caspia Technologies, where he focuses on agentic security workflows. He has decades of experience designing and deploying cryptographic hardware and security IP for top defense and leading semiconductor companies. He previously… Read More
ASML High-NA EUV is Not Ready for High-Volume Production
Contrary to the popular press, ASML High-NA EUV is not ready for logic production yet—and it may never be, at least not in the form originally envisioned. If you remember how long it took conventional EUV to become production-worthy—arguably 5–10 years—this should not come as a surprise. More importantly, this is no longer just… Read More


Quantum Simulation Using Decision Diagrams. Innovation in Verification