Siemens recently released a white paper on a methodology to enhance test coverage for designs with tight DPPM requirements. I confess when I first skimmed the paper, I thought this was another spin on fault simulation for ASIL A-D qualification, but I was corrected and now agree that while there are some conceptual similarities… Read More
What's New with Integrated Product Lifecycle Management (IPLM)I’ve blogged about Methodics before they were acquired…Read More
Cerebras AI Inference Wins Demo of the Year Award at TSMC North America Technology SymposiumThis is a clear reminder of how important…Read More
ClockEdge Delivers Precision, Visibility and Control for Advanced Node Clock NetworksAt advanced nodes, the clock is no longer…Read MoreAI-Driven DRC Productivity Optimization: Insights from Siemens EDA’s 2025 TSMC OIP Presentation
In the rapidly evolving semiconductor industry, Design Rule Checking (DRC) remains a critical bottleneck in chip design workflows. Siemens EDA’s presentation at the 2025 TSMC Open Innovation Platform Forum, titled “AI-Driven DRC Productivity Optimization,” showcases how artificial intelligence … Read More
How PCIe Multistream Architecture Enables AI Connectivity at 64 GT/s and 128 GT/s
As AI and HPC systems scale to thousands of CPUs, GPUs, and accelerators, interconnect performance increasingly determines end-to-end efficiency. Training and inference pipelines rely on low-latency coordination, high-bandwidth memory transfers, and rapid communication across heterogeneous devices. With model sizes… Read More
Revitalizing Semiconductor StartUps
Tarun Verma, Managing Partner of Silicon Catalyst, delivered a keynote at Verification Futures Austin titled “Revitalizing Semiconductor StartUps.” Drawing from his role in the world’s only accelerator focused on the global semiconductor industry, Tarun outlined the sector’s resurgence, persistent… Read More
What’s New with Integrated Product Lifecycle Management (IPLM)
I’ve blogged about Methodics before they were acquired by Perforce back in 2020, so I wanted to get an update on Perforce IPLM (Integrated Product Lifecycle Management) by attending their recent webinar. Hassan Ali Shah, Senior Product Manager and Rien Gahlsdor, Perforce IPLM Product Owner were the two webinar presenters. Their… Read More
Jensen Huang Drops Donald Trump Truth Bomb on Joe Rogan Podcast
How’s that for a clickable title? It really should be called Jensen Huang’s origin story but who is going to click on that?
As podcaster myself I can say without a doubt that this was the best podcast I have listened to all year. During my 30+ EDA and IP career Nvidia was a customer on many different occasions. I do know how… Read More
Cerebras AI Inference Wins Demo of the Year Award at TSMC North America Technology Symposium
This is a clear reminder of how important the semiconductor ecosystem is and how closely TSMC works with customers. The TSMC Symposium started 30 years ago and I have been a part of it ever since. This event is attended by TSMC’s top customers and partners and is the #1 semiconductor networking event of the year, absolutely.… Read More
CEO Interview with Pere Llimós Muntal of Skycore Semiconductors
Pere Llimós Muntal is the CEO and co-founder of Skycore Semiconductors, driving the strategy, business development, and growth of the company as it delivers next-generation power integrated circuit (IC) solutions for applications with extreme power density, efficiency, and form factor demands, such as data center power… Read More
Podcast EP321: An Overview of Soitec’s Worldwide Leadership in Engineered Substrates with Steve Babureck
Daniel is joined by Steve Babureck, executive vice president of strategy and president of Soitec USA. He joined the company in 2011 and held various positions including head of the finance department of the solar business in the United States, head of strategic marketing, and head of Group investor Relations in San Diego and Singapore.… Read More
ClockEdge Delivers Precision, Visibility and Control for Advanced Node Clock Networks
At advanced nodes, the clock is no longer just another signal. It is the most critical and sensitive electrical network on the chip, and the difference between meeting performance targets and missing the tape-out often comes down to a few picoseconds, buried deep inside the clock distribution network. Yet many design teams still… Read More



Jensen Huang Drops Donald Trump Truth Bomb on Joe Rogan Podcast