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Synthesis/DFT/Verification Engineer

Synthesis/DFT/Verification Engineer
by Daniel Nenni on 09-05-2020 at 5:23 pm

Website TSMC

Description
1.Architect test plan for Key customer’s and platform’s Test Vehicles(TV)

2.Develop advanced design for Testing flow

3.Support DFT flow on TV

4.Support STA signoff on TV

5.Presim/Postsim support on TV

Qualifications
1.Master and above

2.EE/CS

3.Expert-level on SNPS DFT and Mentor mBIST flows

4.STA knowledge is required

Apply for job

To view the job application please visit tsmc.taleo.net.