TSMC Canada is looking for a senior memory designer to join its leading edge SRAM design team within TSMC R&D. The Designer will be involved in the research and design of the projects on the world’s most advanced CMOS/FinFET processes (5nm and below). This will involve detailed implementation of high speed and high density memory compilers. One can expect these designs to be used in mainstream products and not just be an academic exercise. Depending on the experience of the candidate, the mandate will be extended appropriately.
The successful candidate will join a world class design team. Their primary responsibility will be to suggest architectures, optimize circuits, maximize for the best balance of power, performance and area possible in TSMC’s advanced process nodes. This includes the circuit design, analog simulation, functional verification, cell characterization, transistor level implementation, optimization, netlisting, flow scripting, design verification, database QC and working closely with colleagues in layout.
5 years of proven track record delivering working memory design
Experienced in advanced process circuit design preferred (e.g. 16nm/10nm/7nm).
A good knowledge of semiconductor physics, circuit theory and CMOS circuit implementation. Experience with FinFET technologies an advantage.
In-depth knowledge of CMOS logic design and analog transistor level optimization
In-depth understanding of full-custom layout generation and its impact on circuit performance is essential. Ability to work with Layout engineers to produce optimal physical implementations.
Proficiency with modern IC design tools both Schematic Capture; Analog and Digital simulators; Behavioural modeling; Functional & Timing Validation, IR/EM Analysis; Physical Verification tools DRC, LVS and Extraction; Compilers; Database management.
Scripting and programming skills to help automate complex design tasks and flows (e.g. skilled with Linux scripting and knowledge of s/w languages like Perl is an advantage)
Ethical, Goal orientated; Excellent quality; Committed to the schedule
Team player; Good communicator; High integrity; Calm under pressure
MSc EE or PhD EE graduate.