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Staff Hardware Verification Engineer – Advanced Engineering

Staff Hardware Verification Engineer – Advanced Engineering
by Admin on 07-25-2023 at 2:15 pm

Website ArterisIP

Key Responsibilities:

  • Advanced UVM based test bench development and debugging
  • Defining, documenting, developing, and executing RTL verification test/coverage at system level
  • Performance verification and power-aware verification
  • Triaging Regressions, Debugging RTL designs in Verilog and System Verilog
  • Help improve and refine verification process, methodology, and metrics
  • UVM expertise on complex SoC projects from test bench development to verification closure

Experience Requirements / Qualifications:


  • 10+ years of experience in SoC digital design & verification
  • Verification flow enhancements using SW programming languages
  • Strong RTL (Verilog) and UVM/C test bench debugging skills
  • Experience integrating vendor provided VIPs for unit and system level verification
  • Excellent problem solving, strong communication and teamwork skills,
  • Self-driven, able to work with minimum supervision.
  • Bilingual in French and English


  • Experience with Arm AMBA protocols
  • Experience with digital HW generators, methodology and concept.

Education Requirements:

  • PhD or master’s degree in Computer Sciences or related field.

Poste based on Biot (06) – Remote possible 1 day / week

Apply for job

To view the job application please visit www.arteris.com.

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