Sr. Principal Software Engineer

Cadence Design Systems is looking for a highly motivated software engineer to work with the RTL Compiler R&D engineering team in the Front-End Design business unit. You will be part of a team responsible for designing, developing, troubleshooting, debugging and supporting timing analysis software. Development responsibilities will include timing analysis engine development, delay calculation engine development, data-model enhancements, and API/Class definition & enhancement.

The successful candidate will possess the following combination of education and experience:

• MS in Computer Science or Electrical Engineering
• Proficient in C/C++
• Excellent programming and software engineering skills
• Experience with UNIX and/or LINUX platforms is preferred
• Strong knowledge of Tcl is preferred
• Experience with multithreaded and/or distributed programming is preferred
• Strong ability to learn
• Strong analysis and problem solving skills
• Prior experience with large software development projects is highly recommended
• Prior experience with timing analysis software development projects is highly recommended
• Good communication skill is preferred as the development team is distributed