Sr. Applications Engineer – Verification

Job Description and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play.  Self-driving cars.  Artificial Intelligence.  The cloud.  5G.  The Internet of Things.  These breakthroughs are ushering in the Era of Smart Everything.  And we’re powering it all with the world’s most advanced technologies for chip design and software security.  If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

On the Verification IP AE team, we help bring up the next generation System Verification solutions leveraging advanced protocol solutions to enable leading edge customers to complete their most challenging IC design projects. Our customers range from industry pioneers to start-ups, developing SoCs for applications including telecommunications, wireless, networking, aerospace and defense, automotive, AI, and high-performance computing.

Applications Engineer, Sr I

The primary focus of this Verification Applications Engineer is to engage with the industry and be a consultant to Semiconductor teams across geographies on deploying advanced technologies to verify the next generation protocols standards on their latest chips. You will be working on latest protocols before they are adopted by industry and drive innovation and automation through adoption across different verification flows. You will excel in and drive understanding in emerging areas like advanced UVM capabilities, working across IP, Subsystem and SOC verification. You will also help drive product direction for the next generation Verification IPs at Synopsys.

Key Qualifications

• Expertise in verification of ASIC/FPGA devices using SV & UVM.
• Excellent understanding of verification process and flow.
• Solid Debugging skill
• Must have worked on standard protocols (AMBA, USB, PCI Express, Ethernet, etc.).
• Experience verifying hierarchically partitioned large ASICs, System Verilog /C++ co-simulation.
• Overall understanding of the ASIC development process, ability to train/mentor junior engineers
• Exceptional communication skill and positive attitude to accept challenging work